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* [Bug target/98698] New: atomic load to FPU registers
@ 2021-01-15 14:47 glisse at gcc dot gnu.org
  2021-12-15  1:13 ` [Bug target/98698] " pinskia at gcc dot gnu.org
  2021-12-15  1:13 ` pinskia at gcc dot gnu.org
  0 siblings, 2 replies; 3+ messages in thread
From: glisse at gcc dot gnu.org @ 2021-01-15 14:47 UTC (permalink / raw)
  To: gcc-bugs

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98698

            Bug ID: 98698
           Summary: atomic load to FPU registers
           Product: gcc
           Version: 11.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: glisse at gcc dot gnu.org
  Target Milestone: ---
            Target: x86_64-*-*

#include <atomic>
std::atomic<double> a;
double f(){ return a.load(std::memory_order_relaxed); }

is compiled by g++ to

        movq    a(%rip), %rax
        movq    %rax, %xmm0
        ret

As far as I understand, a direct movsd to xmm0 would still be atomic, and
that's indeed what llvm outputs.

^ permalink raw reply	[flat|nested] 3+ messages in thread

* [Bug target/98698] atomic load to FPU registers
  2021-01-15 14:47 [Bug target/98698] New: atomic load to FPU registers glisse at gcc dot gnu.org
@ 2021-12-15  1:13 ` pinskia at gcc dot gnu.org
  2021-12-15  1:13 ` pinskia at gcc dot gnu.org
  1 sibling, 0 replies; 3+ messages in thread
From: pinskia at gcc dot gnu.org @ 2021-12-15  1:13 UTC (permalink / raw)
  To: gcc-bugs

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98698

Andrew Pinski <pinskia at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
           Severity|normal                      |enhancement

--- Comment #1 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
Only LLVM does this optimization while ICC and MSVC don't either.

^ permalink raw reply	[flat|nested] 3+ messages in thread

* [Bug target/98698] atomic load to FPU registers
  2021-01-15 14:47 [Bug target/98698] New: atomic load to FPU registers glisse at gcc dot gnu.org
  2021-12-15  1:13 ` [Bug target/98698] " pinskia at gcc dot gnu.org
@ 2021-12-15  1:13 ` pinskia at gcc dot gnu.org
  1 sibling, 0 replies; 3+ messages in thread
From: pinskia at gcc dot gnu.org @ 2021-12-15  1:13 UTC (permalink / raw)
  To: gcc-bugs

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98698

Andrew Pinski <pinskia at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|UNCONFIRMED                 |NEW
     Ever confirmed|0                           |1
   Last reconfirmed|                            |2021-12-15

^ permalink raw reply	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2021-12-15  1:13 UTC | newest]

Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-01-15 14:47 [Bug target/98698] New: atomic load to FPU registers glisse at gcc dot gnu.org
2021-12-15  1:13 ` [Bug target/98698] " pinskia at gcc dot gnu.org
2021-12-15  1:13 ` pinskia at gcc dot gnu.org

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