[Bug target/98833] New: [11 Regression] ICE in extract_insn, at recog.c:2769 since r11-6849-gee78c20e74d30284

[Bug target/98833] New: [11 Regression] ICE in extract_insn, at recog.c:2769 since r11-6849-gee78c20e74d30284

[marxin at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98833

            Bug ID: 98833
           Summary: [11 Regression] ICE in extract_insn, at recog.c:2769
                    since r11-6849-gee78c20e74d30284
           Product: gcc
           Version: 11.0
            Status: UNCONFIRMED
          Keywords: ice-on-valid-code
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: marxin at gcc dot gnu.org
                CC: crazylht at gmail dot com
  Target Milestone: ---
              Host: x86_64-linux
            Target: x86_64-linux-gnu

The following ICEs:

$ cat xop.c
int __attribute__((__vector_size__(4 * sizeof(int)))) * f5_p;

void f5() { *f5_p = 0 == *f5_p; }

$ gcc xop.c -mavx512vl -mxop -O -c
xop.c: In function ‘f5’:
xop.c:3:33: error: unrecognizable insn:
    3 | void f5() { *f5_p = 0 == *f5_p; }
      |                                 ^
(insn 14 15 11 2 (set (reg:V4SI 84 [ _4 ])
        (eq:V4SI (mem:V4SI (reg/f:DI 82 [ f5_p.0_1 ]) [2 *f5_p.0_1+0 S16 A128])
            (reg:V4SI 85))) "xop.c":3:23 -1
     (expr_list:REG_DEAD (reg:V4SI 85)
        (nil)))
during RTL pass: ira
xop.c:3:33: internal compiler error: in extract_insn, at recog.c:2769
0x6fe7bf _fatal_insn(char const*, rtx_def const*, char const*, int, char
const*)
        /home/marxin/Programming/gcc/gcc/rtl-error.c:108
0x6fe7e1 _fatal_insn_not_found(rtx_def const*, char const*, int, char const*)
        /home/marxin/Programming/gcc/gcc/rtl-error.c:116
0x6fc985 extract_insn(rtx_insn*)
        /home/marxin/Programming/gcc/gcc/recog.c:2769
0xc84915 ira_remove_insn_scratches(rtx_insn*, bool, _IO_FILE*, rtx_def*
(*)(rtx_def*))
        /home/marxin/Programming/gcc/gcc/ira.c:5243
0xc85b68 remove_scratches
        /home/marxin/Programming/gcc/gcc/ira.c:5287
0xc85b68 ira
        /home/marxin/Programming/gcc/gcc/ira.c:5602
0xc85b68 execute
        /home/marxin/Programming/gcc/gcc/ira.c:5964
Please submit a full bug report,
with preprocessed source if appropriate.
Please include the complete backtrace with any bug report.
See <https://gcc.gnu.org/bugs/> for instructions.

[Bug target/98833] [11 Regression] ICE in extract_insn, at recog.c:2769 since r11-6849-gee78c20e74d30284

[marxin at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98833

Martin Liška <marxin at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
      Known to work|                            |10.2.0
           Priority|P3                          |P1
     Ever confirmed|0                           |1
   Target Milestone|---                         |11.0
      Known to fail|                            |11.0
   Last reconfirmed|                            |2021-01-26
             Status|UNCONFIRMED                 |NEW

[Bug target/98833] [11 Regression] ICE in extract_insn, at recog.c:2769 since r11-6849-gee78c20e74d30284

[crazylht at gmail dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98833

--- Comment #1 from Hongtao.liu <crazylht at gmail dot com> ---
hmm, why TARGET_SSE2 && !TARGET_XOP?

(define_insn "*sse2_eq<mode>3"
  [(set (match_operand:VI124_128 0 "register_operand" "=x,x")
        (eq:VI124_128
          (match_operand:VI124_128 1 "vector_operand" "%0,x")
          (match_operand:VI124_128 2 "vector_operand" "xBm,xm")))]
  "TARGET_SSE2 && !TARGET_XOP
   && !(MEM_P (operands[1]) && MEM_P (operands[2]))"

[Bug target/98833] [11 Regression] ICE in extract_insn, at recog.c:2769 since r11-6849-gee78c20e74d30284

[crazylht at gmail dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98833

--- Comment #2 from Hongtao.liu <crazylht at gmail dot com> ---
Oh, becuase xop has it's own integer compare

(define_insn "xop_maskcmp<mode>3"
  [(set (match_operand:VI_128 0 "register_operand" "=x")
        (match_operator:VI_128 1 "ix86_comparison_int_operator"
         [(match_operand:VI_128 2 "register_operand" "x")
          (match_operand:VI_128 3 "nonimmediate_operand" "xm")]))]
  "TARGET_XOP"
  "vpcom%Y1<ssemodesuffix>\t{%3, %2, %0|%0, %2, %3}"
  [(set_attr "type" "sse4arg")
   (set_attr "prefix_data16" "0")
   (set_attr "prefix_rep" "0")
   (set_attr "prefix_extra" "2")
   (set_attr "length_immediate" "1")
   (set_attr "mode" "TI")])

[Bug target/98833] [11 Regression] ICE in extract_insn, at recog.c:2769 since r11-6849-gee78c20e74d30284

[jakub at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98833

Jakub Jelinek <jakub at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |jakub at gcc dot gnu.org

--- Comment #3 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
So the options are either to restrict the new define_insn_and_split to
!TARGET_XOP, or split into something different when TARGET_XOP.
Seems it is only for the 128-bit comparisons...

[Bug target/98833] [11 Regression] ICE in extract_insn, at recog.c:2769 since r11-6849-gee78c20e74d30284

[rguenth at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98833

--- Comment #4 from Richard Biener <rguenth at gcc dot gnu.org> ---
Eventually XOP has some "better" compares (vpcom).

Btw, why do we have a define_expand for "sse2_eq<mode>3"?  Do we use this
as building block internally?  Then we should remove the !TARGET_XOP from
that?  That is, I think

(define_insn "xop_maskcmp<mode>3"
  [(set (match_operand:VI_128 0 "register_operand" "=x")
        (match_operator:VI_128 1 "ix86_comparison_int_operator"
         [(match_operand:VI_128 2 "register_operand" "x")
          (match_operand:VI_128 3 "nonimmediate_operand" "xm")]))]
  "TARGET_XOP"

should match what that expander generates?

[Bug target/98833] [11 Regression] ICE in extract_insn, at recog.c:2769 since r11-6849-gee78c20e74d30284

[rguenth at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98833

--- Comment #5 from Richard Biener <rguenth at gcc dot gnu.org> ---
Or rather keep the define_expand but remove the !TARGET_XOP from the
define_insn?
Will we be confused when we have two define_insns matching?

[Bug target/98833] [11 Regression] ICE in extract_insn, at recog.c:2769 since r11-6849-gee78c20e74d30284

[jakub at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98833

--- Comment #6 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
I think the expander is there to perform ix86_fixup_binary_operands_no_copy
(there is a lot of other expanders that have the sole purpose of doing that).

[Bug target/98833] [11 Regression] ICE in extract_insn, at recog.c:2769 since r11-6849-gee78c20e74d30284

[jakub at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98833

--- Comment #7 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
If two insns with the same RTL match, then the first one wins.
But the vpcom instructions have different RTL, so I see no reason for the
!TARGET_XOP.
grepping for sse2_eq I see only:
i386-builtin.def:BDESC (OPTION_MASK_ISA_SSE2, 0, CODE_FOR_sse2_eqv16qi3,
"__builtin_ia32_pcmpeqb128", IX86_BUILTIN_PCMPEQB128, UNKNOWN, (int)
V16QI_FTYPE_V16QI_V16QI)
i386-builtin.def:BDESC (OPTION_MASK_ISA_SSE2, 0, CODE_FOR_sse2_eqv8hi3,
"__builtin_ia32_pcmpeqw128", IX86_BUILTIN_PCMPEQW128, UNKNOWN, (int)
V8HI_FTYPE_V8HI_V8HI)
i386-builtin.def:BDESC (OPTION_MASK_ISA_SSE2, 0, CODE_FOR_sse2_eqv4si3,
"__builtin_ia32_pcmpeqd128", IX86_BUILTIN_PCMPEQD128, UNKNOWN, (int)
V4SI_FTYPE_V4SI_V4SI )
sse.md:(define_insn "*sse2_eq<mode>3"
sse.md:(define_expand "sse2_eq<mode>3"
and those 3 builtins are never used in the headers, so we could as well just
remove them and remove the define_expand too (of course keep *sse2_eq with the
!TARGET_XOP dropped).
Also, grepping for avx2_eq I see:
grep avx2_eq *
i386-builtin.def:BDESC (OPTION_MASK_ISA_AVX2, 0, CODE_FOR_avx2_eqv32qi3,
"__builtin_ia32_pcmpeqb256", IX86_BUILTIN_PCMPEQB256, UNKNOWN, (int)
V32QI_FTYPE_V32QI_V32QI)
i386-builtin.def:BDESC (OPTION_MASK_ISA_AVX2, 0, CODE_FOR_avx2_eqv16hi3,
"__builtin_ia32_pcmpeqw256", IX86_BUILTIN_PCMPEQW256, UNKNOWN, (int)
V16HI_FTYPE_V16HI_V16HI)
i386-builtin.def:BDESC (OPTION_MASK_ISA_AVX2, 0, CODE_FOR_avx2_eqv8si3,
"__builtin_ia32_pcmpeqd256", IX86_BUILTIN_PCMPEQD256, UNKNOWN, (int)
V8SI_FTYPE_V8SI_V8SI )
i386-builtin.def:BDESC (OPTION_MASK_ISA_AVX2, 0, CODE_FOR_avx2_eqv4di3,
"__builtin_ia32_pcmpeqq256", IX86_BUILTIN_PCMPEQQ256, UNKNOWN, (int)
V4DI_FTYPE_V4DI_V4DI )
sse.md:(define_expand "avx2_eq<mode>3"
sse.md:(define_insn "*avx2_eq<mode>3"
sse.md:(define_insn_and_split "*avx2_eq<mode>3"
so perhaps again drop the builtins and expander?
Ditto sse2_gt (no expander, rename insn to *sse2_gt and drop builtins).
For avx2_gt we actually use the expander in one spot, but don't use the
builtins.

[Bug target/98833] [11 Regression] ICE in extract_insn, at recog.c:2769 since r11-6849-gee78c20e74d30284

[crazylht at gmail dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98833

--- Comment #8 from Hongtao.liu <crazylht at gmail dot com> ---
> For avx2_gt we actually use the expander in one spot, but don't use the
> builtins.

Just note, there're also

modified   libcpp/lex.c
@@ -391,10 +391,10 @@ search_line_sse2 (const uchar *s, const uchar *end
ATTRIBUTE_UNUSED)
       mask = -1;

     start:
-      t  = __builtin_ia32_pcmpeqb128(data, repl_nl);
-      t |= __builtin_ia32_pcmpeqb128(data, repl_cr);
-      t |= __builtin_ia32_pcmpeqb128(data, repl_bs);
-      t |= __builtin_ia32_pcmpeqb128(data, repl_qm);
+      t  = data == repl_nl;
+      t |= data == repl_cr;
+      t |= data == repl_bs;
+      t |= data == repl_qm;
       found = __builtin_ia32_pmovmskb128 (t);
       found &= mask;
     }

[Bug target/98833] [11 Regression] ICE in extract_insn, at recog.c:2769 since r11-6849-gee78c20e74d30284

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98833

--- Comment #9 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by hongtao Liu <liuhongt@gcc.gnu.org>:

https://gcc.gnu.org/g:530b1d688761db46b33d26864d3a0684cc82e0f9

commit r11-6926-g530b1d688761db46b33d26864d3a0684cc82e0f9
Author: liuhongt <hongtao.liu@intel.com>
Date:   Wed Jan 27 13:22:36 2021 +0800

    Fix ICE for [PR target/98833].

    And replace __builtin_ia32_pcmpeqb128 with operator == in libcpp.

    gcc/ChangeLog:

            PR target/98833
            * config/i386/sse.md (sse2_gt<mode>3): Drop !TARGET_XOP in
condition.
            (*sse2_eq<mode>3): Ditto.

    gcc/testsuite/ChangeLog:

            PR target/98833
            * gcc.target/i386/pr98833.c: New test.

    libcpp/

            PR target/98833
            * lex.c (search_line_sse2): Replace builtins with == operator.

[Bug target/98833] [11 Regression] ICE in extract_insn, at recog.c:2769 since r11-6849-gee78c20e74d30284

[crazylht at gmail dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98833

--- Comment #10 from Hongtao.liu <crazylht at gmail dot com> ---
Fixed ICE in GCC11, will delete relevant expanders and fold those builtins in
GCC12.

[Bug target/98833] [11 Regression] ICE in extract_insn, at recog.c:2769 since r11-6849-gee78c20e74d30284

[jakub at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98833

Jakub Jelinek <jakub at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
         Resolution|---                         |FIXED
             Status|NEW                         |RESOLVED

--- Comment #11 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
ICE is fixed.