[Bug target/98962] New: Perform bitops on floats directly with SSE

[Bug target/98962] New: Perform bitops on floats directly with SSE

[glisse at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98962

            Bug ID: 98962
           Summary: Perform bitops on floats directly with SSE
           Product: gcc
           Version: 11.0
            Status: UNCONFIRMED
          Keywords: missed-optimization
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: glisse at gcc dot gnu.org
  Target Milestone: ---
            Target: x86_64-*-*

(from https://stackoverflow.com/q/66023408/1918193 )

float f(float a){
  unsigned ai;
  __builtin_memcpy(&ai, &a, 4);
  unsigned ri = ai ^ (1U << 31);
  float r;
  __builtin_memcpy(&r, &ri, 4);
  return r;
}

results in

        movd    %xmm0, %eax
        addl    $-2147483648, %eax
        movd    %eax, %xmm0

while llvm simplifies it to

        xorps   .LCPI0_0(%rip), %xmm0

[Bug rtl-optimization/98962] Perform bitops on floats directly with SSE

[rguenth at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98962

Richard Biener <rguenth at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
   Last reconfirmed|                            |2021-02-04
             Status|UNCONFIRMED                 |NEW
     Ever confirmed|0                           |1
          Component|target                      |rtl-optimization

--- Comment #1 from Richard Biener <rguenth at gcc dot gnu.org> ---
So we expand from

  _4 = VIEW_CONVERT_EXPR<unsigned int>(a_3(D));
  _2 = _4 ^ 2147483648;
  _1 = VIEW_CONVERT_EXPR<float>(_2);
  return _1;

resulting in

(insn 6 5 7 (parallel [
            (set (reg:SI 87)
                (xor:SI (subreg:SI (reg/v:SF 85 [ a ]) 0)
                    (const_int -2147483648 [0xffffffff80000000])))
            (clobber (reg:CC 17 flags))
        ]) "z.c":4:20 -1
     (nil))

(insn 7 6 8 (set (reg:SF 84 [ <retval> ])
        (subreg:SF (reg:SI 87) 0)) "z.c":7:10 -1
     (nil))

initial RTL but CSE1 makes

(insn 6 3 7 2 (parallel [
            (set (reg:SI 87)
                (plus:SI (subreg:SI (reg/v:SF 85 [ a ]) 0)
                    (const_int -2147483648 [0xffffffff80000000])))
            (clobber (reg:CC 17 flags))
        ]) "z.c":4:20 209 {*addsi_1}

out of this likely removing the possibility that fwprop or combine elide
the subregs.

[Bug rtl-optimization/98962] Perform bitops on floats directly with SSE

[jakub at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98962

Jakub Jelinek <jakub at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |jakub at gcc dot gnu.org

--- Comment #2 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
Couldn't e.g. stv do this?

[Bug rtl-optimization/98962] Perform bitops on floats directly with SSE

[jakub at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98962

Jakub Jelinek <jakub at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |uros at gcc dot gnu.org

--- Comment #3 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
Another possibility is add x/v constraints to *andsi_1 and *anddi_1 with the
immediates and disparage that alternative enough to reflect the fact that the
immediate will need to be forced into memory.

[Bug rtl-optimization/98962] Perform bitops on floats directly with SSE

[ubizjak at gmail dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98962

--- Comment #4 from Uroš Bizjak <ubizjak at gmail dot com> ---
(In reply to Jakub Jelinek from comment #3)
> Another possibility is add x/v constraints to *andsi_1 and *anddi_1 with the
> immediates and disparage that alternative enough to reflect the fact that
> the immediate will need to be forced into memory.

Using this approach we risk that under general reg pressure, RA will start to
allocate XMM registers using gr-xmm reloads also in unwanted cases.

[Bug rtl-optimization/98962] Perform bitops on floats directly with SSE

[pinskia at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98962

Andrew Pinski <pinskia at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
           Severity|normal                      |enhancement

--- Comment #5 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
One thing I noticed is clang just changes f to be -a and optimizes that way. 
This was on aarch64.

[Bug rtl-optimization/98962] Perform bitops on floats directly with SSE

[pinskia at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98962

Andrew Pinski <pinskia at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |the4naves at gmail dot com

--- Comment #6 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
*** Bug 101311 has been marked as a duplicate of this bug. ***