[Bug target/99037] New: Invalid representation of vector zero in aarch64-simd.md

[Bug target/99037] New: Invalid representation of vector zero in aarch64-simd.md

[rsandifo at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99037

            Bug ID: 99037
           Summary: Invalid representation of vector zero in
                    aarch64-simd.md
           Product: gcc
           Version: 11.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: rsandifo at gcc dot gnu.org
                CC: andre.simoesdiasvieira at arm dot com
  Target Milestone: ---
            Target: aarch64*-*-*

As Andre noticed, the following patterns have an invalid
representation of constant zero:

- move_lo_quad_internal_<mode>
- move_lo_quad_internal_be_<mode>

The vector forms use (vec_duplicate …) of a constant instead
of a const_vector, and both forms use (const_int 0) even for
FP modes.

In r5-3343 the patterns were split into two, one with a
vec_duplicate and one with a const_int.  But I think that
was the wrong (partial) fix: we should have a single pattern
for each, but use aarch64_simd_or_scalar_imm_zero to match
the right form.

I guess this will have to wait for GCC 12 at this point.

[Bug target/99037] Invalid representation of vector zero in aarch64-simd.md

[rsandifo at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99037

rsandifo at gcc dot gnu.org <rsandifo at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|UNCONFIRMED                 |NEW
     Ever confirmed|0                           |1
   Target Milestone|---                         |12.0
   Last reconfirmed|                            |2021-02-09

[Bug target/99037] Invalid representation of vector zero in aarch64-simd.md

[ktkachov at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99037

ktkachov at gcc dot gnu.org changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|NEW                         |ASSIGNED
           Assignee|unassigned at gcc dot gnu.org      |ktkachov at gcc dot gnu.org
                 CC|                            |ktkachov at gcc dot gnu.org

--- Comment #1 from ktkachov at gcc dot gnu.org ---
Got a patch to fix it for GCC 12.

[Bug target/99037] Invalid representation of vector zero in aarch64-simd.md

[ktkachov at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99037

ktkachov at gcc dot gnu.org changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |asolokha at gmx dot com

--- Comment #2 from ktkachov at gcc dot gnu.org ---
*** Bug 99808 has been marked as a duplicate of this bug. ***

[Bug target/99037] Invalid representation of vector zero in aarch64-simd.md

[jakub at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99037

Jakub Jelinek <jakub at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |jakub at gcc dot gnu.org

--- Comment #3 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
Kyrylo, will you handle it then?  
As VHALF is a scalar mode for V2* vectors and a vector mode otherwise,
reverting r5-3343 should be possible, just use match_operand:<VHALF> 2
"aarch64_simd_or_scalar_imm_zero".

[Bug target/99037] Invalid representation of vector zero in aarch64-simd.md

[jakub at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99037

--- Comment #4 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
And my patch in the other PR was incorrect, should have just used CONST0_RTX
(<VHALF>mode); always.

[Bug target/99037] Invalid representation of vector zero in aarch64-simd.md

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99037

--- Comment #5 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Kyrylo Tkachov <ktkachov@gcc.gnu.org>:

https://gcc.gnu.org/g:37d9074e12082132ae62c12fbe958c697f638c0a

commit r11-7888-g37d9074e12082132ae62c12fbe958c697f638c0a
Author: Kyrylo Tkachov <kyrylo.tkachov@arm.com>
Date:   Mon Mar 29 11:52:24 2021 +0100

    aarch64: PR target/99037 Fix RTL represntation in move_lo_quad patterns

    This patch fixes the RTL representation of the move_lo_quad patterns to use
aarch64_simd_or_scalar_imm_zero
    for the zero part rather than a vec_duplicate of zero or a const_int 0.
    The expander that generates them is also adjusted so that we use and match
the correct const_vector forms throughout.

    Co-Authored-By: Jakub Jelinek <jakub@redhat.com>

    gcc/ChangeLog:

            PR target/99037
            * config/aarch64/aarch64-simd.md (move_lo_quad_internal_<mode>):
Use
            aarch64_simd_or_scalar_imm_zero to match zeroes.  Remove pattern
            matching const_int 0.
            (move_lo_quad_internal_be_<mode>): Likewise.
            (move_lo_quad_<mode>): Update for the above.
            * config/aarch64/iterators.md (VQ_2E): Delete.

    gcc/testsuite/ChangeLog:

            PR target/99808
            * gcc.target/aarch64/pr99808.c: New test.

[Bug target/99037] Invalid representation of vector zero in aarch64-simd.md

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99037

--- Comment #6 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The releases/gcc-10 branch has been updated by Kyrylo Tkachov
<ktkachov@gcc.gnu.org>:

https://gcc.gnu.org/g:1a92899b08e61d503a2897f2f66b064eb84706bc

commit r10-9628-g1a92899b08e61d503a2897f2f66b064eb84706bc
Author: Kyrylo Tkachov <kyrylo.tkachov@arm.com>
Date:   Mon Mar 29 11:52:24 2021 +0100

    aarch64: PR target/99037 Fix RTL represntation in move_lo_quad patterns

    This patch fixes the RTL representation of the move_lo_quad patterns to use
aarch64_simd_or_scalar_imm_zero
    for the zero part rather than a vec_duplicate of zero or a const_int 0.
    The expander that generates them is also adjusted so that we use and match
the correct const_vector forms throughout.

    Co-Authored-By: Jakub Jelinek <jakub@redhat.com>

    gcc/ChangeLog:

            PR target/99037
            * config/aarch64/aarch64-simd.md (move_lo_quad_internal_<mode>):
Use
            aarch64_simd_or_scalar_imm_zero to match zeroes.  Remove pattern
            matching const_int 0.
            (move_lo_quad_internal_be_<mode>): Likewise.
            (move_lo_quad_<mode>): Update for the above.
            * config/aarch64/iterators.md (VQ_2E): Delete.

    gcc/testsuite/ChangeLog:

            PR target/99808
            * gcc.target/aarch64/pr99808.c: New test.

[Bug target/99037] Invalid representation of vector zero in aarch64-simd.md

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99037

--- Comment #7 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The releases/gcc-9 branch has been updated by Kyrylo Tkachov
<ktkachov@gcc.gnu.org>:

https://gcc.gnu.org/g:3a9504e1f03bc2980062dc62261212e8635bcf93

commit r9-9519-g3a9504e1f03bc2980062dc62261212e8635bcf93
Author: Kyrylo Tkachov <kyrylo.tkachov@arm.com>
Date:   Fri May 7 11:35:29 2021 +0100

    aarch64: PR target/99037 Fix RTL represntation in move_lo_quad patterns

    This patch fixes the RTL representation of the move_lo_quad patterns to use
aarch64_simd_or_scalar_imm_zero
    for the zero part rather than a vec_duplicate of zero or a const_int 0.
    The expander that generates them is also adjusted so that we use and match
the correct const_vector forms throughout.

    Co-Authored-By: Jakub Jelinek <jakub@redhat.com>
    gcc/ChangeLog:

            PR target/99037
            PR target/100441
            * config/aarch64/aarch64-simd.md (move_lo_quad_internal_<mode>):
Use
            aarch64_simd_or_scalar_imm_zero to match zeroes.  Remove pattern
            matching const_int 0.
            (move_lo_quad_internal_be_<mode>): Likewise.
            (move_lo_quad_<mode>): Update for the above.
            * config/aarch64/iterators.md (VQ_2E): Delete.

    gcc/testsuite/ChangeLog:

            PR target/99808
            * gcc.target/aarch64/pr99808.c: New test.

[Bug target/99037] Invalid representation of vector zero in aarch64-simd.md

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99037

--- Comment #8 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The releases/gcc-8 branch has been updated by Kyrylo Tkachov
<ktkachov@gcc.gnu.org>:

https://gcc.gnu.org/g:64b6b1d1bc796a7fea189a4c4b0e290540f51ae3

commit r8-10956-g64b6b1d1bc796a7fea189a4c4b0e290540f51ae3
Author: Kyrylo Tkachov <kyrylo.tkachov@arm.com>
Date:   Fri May 7 11:36:54 2021 +0100

    aarch64: PR target/99037 Fix RTL represntation in move_lo_quad patterns

    This patch fixes the RTL representation of the move_lo_quad patterns to use
aarch64_simd_or_scalar_imm_zero
    for the zero part rather than a vec_duplicate of zero or a const_int 0.
    The expander that generates them is also adjusted so that we use and match
the correct const_vector forms throughout.

    Co-Authored-By: Jakub Jelinek <jakub@redhat.com>
    gcc/ChangeLog:

            PR target/99037
            PR target/100441
            * config/aarch64/aarch64-simd.md (move_lo_quad_internal_<mode>):
Use
            aarch64_simd_or_scalar_imm_zero to match zeroes.  Remove pattern
            matching const_int 0.
            (move_lo_quad_internal_be_<mode>): Likewise.
            (move_lo_quad_<mode>): Update for the above.
            * config/aarch64/iterators.md (VQ_2E): Delete.

    gcc/testsuite/ChangeLog:

            PR target/99808
            * gcc.target/aarch64/pr99808.c: New test.

[Bug target/99037] Invalid representation of vector zero in aarch64-simd.md

[jakub at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99037

Jakub Jelinek <jakub at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
   Target Milestone|12.0                        |12.2

--- Comment #9 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
GCC 12.1 is being released, retargeting bugs to GCC 12.2.

[Bug target/99037] Invalid representation of vector zero in aarch64-simd.md

[ktkachov at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99037

ktkachov at gcc dot gnu.org changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
         Resolution|---                         |FIXED
             Status|ASSIGNED                    |RESOLVED

--- Comment #10 from ktkachov at gcc dot gnu.org ---
This has been fixed in all active branches.