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* [Bug target/99102] New: SVE: Wrong code with -O2 -ftree-vectorize -march=armv8.2-a+sve -msve-vector-bits=256
@ 2021-02-15 10:19 acoplan at gcc dot gnu.org
  2021-02-15 10:49 ` [Bug target/99102] [11 Regression] " acoplan at gcc dot gnu.org
                   ` (7 more replies)
  0 siblings, 8 replies; 9+ messages in thread
From: acoplan at gcc dot gnu.org @ 2021-02-15 10:19 UTC (permalink / raw)
  To: gcc-bugs

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99102

            Bug ID: 99102
           Summary: SVE: Wrong code with -O2 -ftree-vectorize
                    -march=armv8.2-a+sve -msve-vector-bits=256
           Product: gcc
           Version: 11.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: acoplan at gcc dot gnu.org
  Target Milestone: ---

AArch64 GCC miscompiles the following testcase:

long a[44];
short d, e = -7;
void b(char f, short j, short k, unsigned l) {
  for (int g = 0; g < 9; g += f)
    for (int b = 0; b < 90; b -= k)
      for (int h = 0; h < f; h++)
        for (short i = 0; i < 15; i += 4)
          if (!l)
            a[i] = j;
}
int main() {
  for (long c = 0; c < 2; ++c)
    a[c] = 7;
  b(9, d, e, 5);
  if (!a[0])
    __builtin_abort();
}

at -O2 -ftree-vectorize -march=armv8.2-a+sve -msve-vector-bits=256. Looking at
the generated code for b:

b:
.LFB0:
        .cfi_startproc
        adrp    x3, .LANCHOR0
        and     w0, w0, 255
        sxth    w2, w2
        add     x3, x3, :lo12:.LANCHOR0
        mov     w5, 0
        mov     z0.h, w1
        ptrue   p0.b, vl32
        mov     x1, 32
        sxth    z0.d, p0/m, z0.d
        index   z1.d, #0, x1
.L2:
        mov     w4, 0
        .p2align 3,,7
.L7:
        mov     w1, 0
        cbz     w0, .L5
        .p2align 3,,7
.L3:
        add     w1, w1, 1
        st1d    z0.d, p0, [x3, z1.d]
        cmp     w0, w1
        bne     .L3
.L5:
        sub     w4, w4, w2
        cmp     w4, 89
        ble     .L7
        add     w5, w5, w0
        cmp     w5, 8
        ble     .L2
        ret

we appear to ignore the value for the argument "l" completely (we immediately
clobber x3 with the address for a).

^ permalink raw reply	[flat|nested] 9+ messages in thread
end of thread, other threads:[~2021-03-30 16:05 UTC | newest]

Thread overview: 9+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-02-15 10:19 [Bug target/99102] New: SVE: Wrong code with -O2 -ftree-vectorize -march=armv8.2-a+sve -msve-vector-bits=256 acoplan at gcc dot gnu.org
2021-02-15 10:49 ` [Bug target/99102] [11 Regression] " acoplan at gcc dot gnu.org
2021-02-15 12:08 ` ktkachov at gcc dot gnu.org
2021-02-25 16:43 ` joelh at gcc dot gnu.org
2021-03-03 12:22 ` joelh at gcc dot gnu.org
2021-03-05 16:18 ` joelh at gcc dot gnu.org
2021-03-10 12:26 ` cvs-commit at gcc dot gnu.org
2021-03-10 12:48 ` joelh at gcc dot gnu.org
2021-03-30 16:05 ` rsandifo at gcc dot gnu.org

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