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* [Bug c++/99582] New: No intrinsics to access rcl or rcr instruction on x86_64
@ 2021-03-14 7:14 unlvsur at live dot com
2021-03-15 8:43 ` [Bug target/99582] " rguenth at gcc dot gnu.org
` (3 more replies)
0 siblings, 4 replies; 5+ messages in thread
From: unlvsur at live dot com @ 2021-03-14 7:14 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99582
Bug ID: 99582
Summary: No intrinsics to access rcl or rcr instruction on
x86_64
Product: gcc
Version: 11.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: c++
Assignee: unassigned at gcc dot gnu.org
Reporter: unlvsur at live dot com
Target Milestone: ---
How to deal with this? Any compiler patterns to access this instruction?
^ permalink raw reply [flat|nested] 5+ messages in thread
* [Bug target/99582] No intrinsics to access rcl or rcr instruction on x86_64
2021-03-14 7:14 [Bug c++/99582] New: No intrinsics to access rcl or rcr instruction on x86_64 unlvsur at live dot com
@ 2021-03-15 8:43 ` rguenth at gcc dot gnu.org
2021-03-15 10:21 ` unlvsur at live dot com
` (2 subsequent siblings)
3 siblings, 0 replies; 5+ messages in thread
From: rguenth at gcc dot gnu.org @ 2021-03-15 8:43 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99582
Richard Biener <rguenth at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Severity|normal |enhancement
--- Comment #1 from Richard Biener <rguenth at gcc dot gnu.org> ---
ROR can be open-coded, GCC tries hard to detect common patterns.
RCR is difficult because it involves the carry flag and thus the carry producer
would have to be explicit. Or it would need to be an awkward intrinsic
like
__builtin_rcr ({unsigned, unsigned short, unsigned char} word, bool carry,
unsigned amnt);
and you'd need to hope the compiler can arrange 'carry' to be produced in
the carry flag ...
^ permalink raw reply [flat|nested] 5+ messages in thread
* [Bug target/99582] No intrinsics to access rcl or rcr instruction on x86_64
2021-03-14 7:14 [Bug c++/99582] New: No intrinsics to access rcl or rcr instruction on x86_64 unlvsur at live dot com
2021-03-15 8:43 ` [Bug target/99582] " rguenth at gcc dot gnu.org
@ 2021-03-15 10:21 ` unlvsur at live dot com
2021-03-23 14:11 ` amonakov at gcc dot gnu.org
2021-03-23 14:14 ` unlvsur at live dot com
3 siblings, 0 replies; 5+ messages in thread
From: unlvsur at live dot com @ 2021-03-15 10:21 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99582
--- Comment #2 from cqwrteur <unlvsur at live dot com> ---
(In reply to Richard Biener from comment #1)
> ROR can be open-coded, GCC tries hard to detect common patterns.
>
> RCR is difficult because it involves the carry flag and thus the carry
> producer
> would have to be explicit. Or it would need to be an awkward intrinsic
> like
>
> __builtin_rcr ({unsigned, unsigned short, unsigned char} word, bool carry,
> unsigned amnt);
>
> and you'd need to hope the compiler can arrange 'carry' to be produced in
> the carry flag ...
so is that possible to __builtin_rcl and __builtin_rcr? I think a lot of
cryptography and multi-precision libraries need that for pow stuffs
^ permalink raw reply [flat|nested] 5+ messages in thread
* [Bug target/99582] No intrinsics to access rcl or rcr instruction on x86_64
2021-03-14 7:14 [Bug c++/99582] New: No intrinsics to access rcl or rcr instruction on x86_64 unlvsur at live dot com
2021-03-15 8:43 ` [Bug target/99582] " rguenth at gcc dot gnu.org
2021-03-15 10:21 ` unlvsur at live dot com
@ 2021-03-23 14:11 ` amonakov at gcc dot gnu.org
2021-03-23 14:14 ` unlvsur at live dot com
3 siblings, 0 replies; 5+ messages in thread
From: amonakov at gcc dot gnu.org @ 2021-03-23 14:11 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99582
Alexander Monakov <amonakov at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
CC| |amonakov at gcc dot gnu.org
--- Comment #3 from Alexander Monakov <amonakov at gcc dot gnu.org> ---
RCL and RCR are supported via microcode sequencer on Intel and involve many (9)
uops on modern AMD, so they are quite slow in comparison to simple
shifts/rotates. Would library developers still want to use them despite the
poor performance? Equivalent code with "classic" shifts should be more
efficient.
https://uops.info/html-instr/RCL_R64_CL.html
^ permalink raw reply [flat|nested] 5+ messages in thread
* [Bug target/99582] No intrinsics to access rcl or rcr instruction on x86_64
2021-03-14 7:14 [Bug c++/99582] New: No intrinsics to access rcl or rcr instruction on x86_64 unlvsur at live dot com
` (2 preceding siblings ...)
2021-03-23 14:11 ` amonakov at gcc dot gnu.org
@ 2021-03-23 14:14 ` unlvsur at live dot com
3 siblings, 0 replies; 5+ messages in thread
From: unlvsur at live dot com @ 2021-03-23 14:14 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99582
--- Comment #4 from cqwrteur <unlvsur at live dot com> ---
(In reply to Alexander Monakov from comment #3)
> RCL and RCR are supported via microcode sequencer on Intel and involve many
> (9) uops on modern AMD, so they are quite slow in comparison to simple
> shifts/rotates. Would library developers still want to use them despite the
> poor performance? Equivalent code with "classic" shifts should be more
> efficient.
>
> https://uops.info/html-instr/RCL_R64_CL.html
here they want is to get the carry flag from rcl/rcr
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2021-03-23 14:14 UTC | newest]
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2021-03-14 7:14 [Bug c++/99582] New: No intrinsics to access rcl or rcr instruction on x86_64 unlvsur at live dot com
2021-03-15 8:43 ` [Bug target/99582] " rguenth at gcc dot gnu.org
2021-03-15 10:21 ` unlvsur at live dot com
2021-03-23 14:11 ` amonakov at gcc dot gnu.org
2021-03-23 14:14 ` unlvsur at live dot com
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