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From: "jakub at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug c/99810] Wrong const evaluation of 64-bit division
Date: Mon, 29 Mar 2021 08:01:40 +0000 [thread overview]
Message-ID: <bug-99810-4-7bo53JvUG2@http.gcc.gnu.org/bugzilla/> (raw)
In-Reply-To: <bug-99810-4@http.gcc.gnu.org/bugzilla/>
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99810
Jakub Jelinek <jakub at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
CC| |jakub at gcc dot gnu.org
--- Comment #1 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
Have you actually tried to run it on ARM, or are you just watching godbolt
assembly?
I see there:
.LC0:
.ascii "%lld\012\000"
main:
push {fp, lr}
add fp, sp, #4
ldr r2, .L3
mvn r3, #14
ldr r0, .L3+4
bl printf
mov r3, #0
mov r0, r3
sub sp, fp, #4
pop {fp, lr}
bx lr
.L3:
.word -2006227456
.word .LC0
which means that r2 register will contain 0x886b6600 and r3 register ~14, i.e.
0xfffffff1.
next prev parent reply other threads:[~2021-03-29 8:01 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-29 7:52 [Bug c/99810] New: " gcc at cookiesoft dot de
2021-03-29 8:01 ` jakub at gcc dot gnu.org [this message]
2021-03-29 8:06 ` [Bug c/99810] " rguenth at gcc dot gnu.org
2021-03-29 8:07 ` gcc at cookiesoft dot de
2021-03-29 8:14 ` jakub at gcc dot gnu.org
2021-03-29 8:18 ` gcc at cookiesoft dot de
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