* [Bug c/99810] Wrong const evaluation of 64-bit division
2021-03-29 7:52 [Bug c/99810] New: Wrong const evaluation of 64-bit division gcc at cookiesoft dot de
@ 2021-03-29 8:01 ` jakub at gcc dot gnu.org
2021-03-29 8:06 ` rguenth at gcc dot gnu.org
` (3 subsequent siblings)
4 siblings, 0 replies; 6+ messages in thread
From: jakub at gcc dot gnu.org @ 2021-03-29 8:01 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99810
Jakub Jelinek <jakub at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
CC| |jakub at gcc dot gnu.org
--- Comment #1 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
Have you actually tried to run it on ARM, or are you just watching godbolt
assembly?
I see there:
.LC0:
.ascii "%lld\012\000"
main:
push {fp, lr}
add fp, sp, #4
ldr r2, .L3
mvn r3, #14
ldr r0, .L3+4
bl printf
mov r3, #0
mov r0, r3
sub sp, fp, #4
pop {fp, lr}
bx lr
.L3:
.word -2006227456
.word .LC0
which means that r2 register will contain 0x886b6600 and r3 register ~14, i.e.
0xfffffff1.
^ permalink raw reply [flat|nested] 6+ messages in thread* [Bug c/99810] Wrong const evaluation of 64-bit division
2021-03-29 7:52 [Bug c/99810] New: Wrong const evaluation of 64-bit division gcc at cookiesoft dot de
2021-03-29 8:01 ` [Bug c/99810] " jakub at gcc dot gnu.org
@ 2021-03-29 8:06 ` rguenth at gcc dot gnu.org
2021-03-29 8:07 ` gcc at cookiesoft dot de
` (2 subsequent siblings)
4 siblings, 0 replies; 6+ messages in thread
From: rguenth at gcc dot gnu.org @ 2021-03-29 8:06 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99810
--- Comment #2 from Richard Biener <rguenth at gcc dot gnu.org> ---
mdreorg turns
(insn 5 2 18 2 (set (reg:DI 2 r2)
(const_int -62135769600 [0xfffffff1886b6600])) "t.c":2:5 251
{*arm_movdi}
(nil))
into
(insn 5 2 18 (set (reg:DI 2 r2)
(mem:DI (label_ref 29) [0 S8 A64])) "t.c":2:5 251 {*arm_movdi}
(nil))
but the constant pool entry looks OK to me (just checked on trunk though)
^ permalink raw reply [flat|nested] 6+ messages in thread* [Bug c/99810] Wrong const evaluation of 64-bit division
2021-03-29 7:52 [Bug c/99810] New: Wrong const evaluation of 64-bit division gcc at cookiesoft dot de
2021-03-29 8:01 ` [Bug c/99810] " jakub at gcc dot gnu.org
2021-03-29 8:06 ` rguenth at gcc dot gnu.org
@ 2021-03-29 8:07 ` gcc at cookiesoft dot de
2021-03-29 8:14 ` jakub at gcc dot gnu.org
2021-03-29 8:18 ` gcc at cookiesoft dot de
4 siblings, 0 replies; 6+ messages in thread
From: gcc at cookiesoft dot de @ 2021-03-29 8:07 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99810
--- Comment #3 from gcc at cookiesoft dot de ---
I actually haven't, but yes, you're right that it will print out the correct
value.
I'm somewhat sorry for the noise.
Is there a reason, e.g. performance, that the .word is "wrong"?
^ permalink raw reply [flat|nested] 6+ messages in thread
* [Bug c/99810] Wrong const evaluation of 64-bit division
2021-03-29 7:52 [Bug c/99810] New: Wrong const evaluation of 64-bit division gcc at cookiesoft dot de
` (2 preceding siblings ...)
2021-03-29 8:07 ` gcc at cookiesoft dot de
@ 2021-03-29 8:14 ` jakub at gcc dot gnu.org
2021-03-29 8:18 ` gcc at cookiesoft dot de
4 siblings, 0 replies; 6+ messages in thread
From: jakub at gcc dot gnu.org @ 2021-03-29 8:14 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99810
Jakub Jelinek <jakub at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Status|UNCONFIRMED |RESOLVED
Resolution|--- |INVALID
--- Comment #4 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
.word in ARM assembly is 32-bit, so it is not wrong.
64-bit values need to be put into two hw registers, and there is not a single
instruction to put 0x886b6600 into a 32-bit register, but there is a single
instruction to put 0xfffffff1 into a 32-bit register, so the code loads one
part from the constant pool and the other part uses mvn instruction (move
negated) with a small immediate.
^ permalink raw reply [flat|nested] 6+ messages in thread* [Bug c/99810] Wrong const evaluation of 64-bit division
2021-03-29 7:52 [Bug c/99810] New: Wrong const evaluation of 64-bit division gcc at cookiesoft dot de
` (3 preceding siblings ...)
2021-03-29 8:14 ` jakub at gcc dot gnu.org
@ 2021-03-29 8:18 ` gcc at cookiesoft dot de
4 siblings, 0 replies; 6+ messages in thread
From: gcc at cookiesoft dot de @ 2021-03-29 8:18 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99810
--- Comment #5 from gcc at cookiesoft dot de ---
Alright. Then again, sorry for the noise. I was hunting down a bug and thought
I found it with this one... so I have to search further.
Thank you everyone!
^ permalink raw reply [flat|nested] 6+ messages in thread