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From: Philipp Tomsich <ptomsich@sourceware.org>
To: gcc-cvs-wwwdocs@gcc.gnu.org
Subject: gcc-wwwdocs branch master updated. 2b40df15e0bdac2bfa38ed9f881c16c801044e45
Date: Wed, 15 Mar 2023 09:09:09 +0000 (GMT)	[thread overview]
Message-ID: <20230315090909.2555E3858D33@sourceware.org> (raw)

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- Log -----------------------------------------------------------------
commit 2b40df15e0bdac2bfa38ed9f881c16c801044e45
Author: Christoph Müllner <christoph.muellner@vrull.eu>
Date:   Wed Mar 15 10:08:18 2023 +0100

    gcc-13: riscv: Document the T-Head CPU support
    
    Document the new T-Head CPU support for RISC-V.
    
    Signed-off-by: Philipp Tomsich <philipp.tomsich@vrull.eu>

diff --git a/htdocs/gcc-13/changes.html b/htdocs/gcc-13/changes.html
index 209c13cd..c8d757b6 100644
--- a/htdocs/gcc-13/changes.html
+++ b/htdocs/gcc-13/changes.html
@@ -552,6 +552,28 @@ a work-in-progress.</p>
 <h3 id="riscv">RISC-V</h3>
 <ul>
     <li>New ISA extension support for zawrs.</li>
+    <li>Support for the following vendor extensions has been added:
+      <ul>
+        <li>XTheadBa</li>
+        <li>XTheadBb</li>
+        <li>XTheadBs</li>
+        <li>XTheadCmo</li>
+        <li>XTheadCondMov</li>
+        <li>XTheadFMemIdx</li>
+        <li>XTheadFmv</li>
+        <li>XTheadInt</li>
+        <li>XTheadMac</li>
+        <li>XTheadMemIdx</li>
+        <li>XTheadMemPair</li>
+        <li>XTheadSync</li>
+      </ul>
+    </li>
+    <li>The following new CPUs are supported through the <code>-mcpu</code>
+      option (GCC identifiers in parentheses).
+      <ul>
+        <li>T-Head's XuanTie C906 (<code>thead-c906</code>).</li>
+      </ul>
+    </li>
 </ul>
 
 <!-- <h3 id="rx">RX</h3> -->

-----------------------------------------------------------------------

Summary of changes:
 htdocs/gcc-13/changes.html | 22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)


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