[gcc(refs/users/meissner/heads/work046)] Update ChangeLog.meissner.

[gcc(refs/users/meissner/heads/work046)] Update ChangeLog.meissner.

[Michael Meissner]

https://gcc.gnu.org/g:c7f8c0b634eb4b20e25c0836db348e10ce08812d

commit c7f8c0b634eb4b20e25c0836db348e10ce08812d
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Mon Apr 12 17:14:32 2021 -0400

    Update ChangeLog.meissner.
    
    gcc/
    2021-04-12  Michael Meissner  <meissner@linux.ibm.com>
    
            * ChangeLog.meissner: Update.

Diff:
---
 gcc/ChangeLog.meissner | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index a5026a105f7..d409989ce92 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,13 @@
+work046.patch021:
+2021-04-12  Michael Meissner  <meissner@linux.ibm.com>
+
+	* config/rs6000/rs6000.c (xxsplti32dx_constant_p): Add support for
+	V4SImode and V4SFmode.
+	* config/rs6000/vsx.md (XXSPLTI32DX): Extend iterator to include
+	V4SImode and V4SFmode.
+	(xxsplti32dx_<mode>): Properly handle optimizing the second word
+	being all 1's.
+
 work046.patch020:
 2021-04-09  Michael Meissner  <meissner@linux.ibm.com>

[gcc(refs/users/meissner/heads/work046)] Update ChangeLog.meissner.

[Michael Meissner]

https://gcc.gnu.org/g:9a01bf60394f205b89ff0feff4623f9b7c3cbf85

commit 9a01bf60394f205b89ff0feff4623f9b7c3cbf85
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Fri Apr 9 23:07:07 2021 -0400

    Update ChangeLog.meissner.
    
    gcc/
    2021-04-09  Michael Meissner  <meissner@linux.ibm.com>
    
            * ChangeLog.meissner: Update.

Diff:
---
 gcc/ChangeLog.meissner | 13 ++++++++-----
 1 file changed, 8 insertions(+), 5 deletions(-)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index 7720803f723..a5026a105f7 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,10 @@
+work046.patch020:
+2021-04-09  Michael Meissner  <meissner@linux.ibm.com>
+
+	* config.gcc (powerpc*-*-*, rs6000-*-*): Do not set
+	LINK_OS_EXTRA_SPEC664 for the Advance Toolchain.  Continue to set
+	LINK_OS_EXTRA_SPEC32.
+
 work046.patch018:
 2021-04-08  Michael Meissner  <meissner@linux.ibm.com>
 
@@ -155,11 +162,7 @@ work046.patch010:
 	type to long.
 
 work046.patch009:
-2021-04-07  Michael Meissner  <meissner@linux.ibm.com>
-
-	* config.gcc (powerpc*-*-*, rs6000-*-*): Do not set
-	LINK_OS_EXTRA_SPEC32 or LINK_OS_EXTRA_SPEC664 for the Advance
-	Toolchain.
+Patch reverted.  See work046.patch020.
 
 work046.patch007:
 2021-04-07  Michael Meissner  <meissner@linux.ibm.com>

[gcc(refs/users/meissner/heads/work046)] Update ChangeLog.meissner.

[Michael Meissner]

https://gcc.gnu.org/g:54350dda5c43ba02ca1e3d001f713ddf58753a41

commit 54350dda5c43ba02ca1e3d001f713ddf58753a41
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Fri Apr 9 15:49:34 2021 -0400

    Update ChangeLog.meissner.
    
    libgcc/
    2021-04-09  Michael Meissner  <meissner@linux.ibm.com>
    
            * ChangeLog.meissner: Update.

Diff:
---
 libgcc/ChangeLog.meissner | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/libgcc/ChangeLog.meissner b/libgcc/ChangeLog.meissner
index 5cf3f455cbe..5e52674a35f 100644
--- a/libgcc/ChangeLog.meissner
+++ b/libgcc/ChangeLog.meissner
@@ -1,3 +1,10 @@
+work046.patch019:
+2021-04-09  Michael Meissner  <meissner@linux.ibm.com>
+
+	PR target/98952
+	* config/rs6000/tramp.S (__trampoline_setup): Fix trampoline size
+	comparison in 32-bit.
+
 work046.patch008:
 2021-04-07  Michael Meissner  <meissner@linux.ibm.com>

[gcc(refs/users/meissner/heads/work046)] Update ChangeLog.meissner.

[Michael Meissner]

https://gcc.gnu.org/g:07d6d991c6ddc1d3e022d532583e5bdcfaefbf0e

commit 07d6d991c6ddc1d3e022d532583e5bdcfaefbf0e
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Thu Apr 8 16:08:49 2021 -0400

    Update ChangeLog.meissner.
    
    gcc/
    2021-04-08  Michael Meissner  <meissner@linux.ibm.com>
    
            * ChangeLog.meissner: Update.

Diff:
---
 gcc/testsuite/ChangeLog.meissner | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/gcc/testsuite/ChangeLog.meissner b/gcc/testsuite/ChangeLog.meissner
index a846d7f1637..51f42f426fb 100644
--- a/gcc/testsuite/ChangeLog.meissner
+++ b/gcc/testsuite/ChangeLog.meissner
@@ -2,6 +2,10 @@ work046.patch018:
 2021-04-08  Michael Meissner  <meissner@linux.ibm.com>
 
 	* gcc.target/powerpc/vec-splati-runnable.c: Update insn count.
+	* gcc.target/powerpc/vec-splat-constant-sf.c: Update insn count.
+	* gcc.target/powerpc/vec-splat-constant-df.c: Update insn count.
+	* gcc.target/powerpc/vec-splat-constant-v2df.c: Update insn
+	count.
 
 work046.patch014:
 2021-04-07  Michael Meissner  <meissner@linux.ibm.com>

[gcc(refs/users/meissner/heads/work046)] Update ChangeLog.meissner.

[Michael Meissner]

https://gcc.gnu.org/g:9ff5a86e339b99139d72284a5f2ab01dafd3f479

commit 9ff5a86e339b99139d72284a5f2ab01dafd3f479
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Thu Apr 8 01:37:44 2021 -0400

    Update ChangeLog.meissner.
    
    gcc/
    2021-04-08  Michael Meissner  <meissner@linux.ibm.com>
    
            * ChangeLog.meissner: Update.
    
    gcc/testsuite/
    2021-04-08  Michael Meissner  <meissner@linux.ibm.com>
    
            * ChangeLog.meissner: Update.

Diff:
---
 gcc/ChangeLog.meissner           | 71 ++++++++++++++++++++++++++++++++++++++++
 gcc/testsuite/ChangeLog.meissner |  5 +++
 2 files changed, 76 insertions(+)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index a8bb03c3fc5..7720803f723 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,74 @@
+work046.patch018:
+2021-04-08  Michael Meissner  <meissner@linux.ibm.com>
+
+	* config/rs6000/contraints.md (eD): New constraint.
+	* config/rs6000/predicates.md (easy_fp_constant): If we can load
+	the constant with a pair of XXSPLTI32DX instructions, it is easy.
+	(xxsplti32dx_operand): New predicate.
+	(easy_vector_constant): If we can load the constant with a pair of
+	XXSPLTI32DX instructions, it is easy.
+	* config/rs6000/rs6000-cpus.def (OTHER_POWER10_MASKS): Add
+	-mxxsplti32dx.
+	(POWERPC_MASKS): Add -mxxsplti32dx.
+	* config/rs6000/rs6000-protos.h (xxsplti32dx_constant_p): New
+	declaration.
+	* config/rs6000/rs6000.c (rs6000_option_override_internal): Add
+	-mxxsplti32dx support.
+	(xxsplti32dx_constant_p): New helper function.
+	(output_vec_const_move): Split constants that need XXSPLTI32DX.
+	(rs6000_opt_masks): Add -mxxsplti32dx.
+	* config/rs6000/rs6000.md (movsf_hardfloat): Add support for
+	loading constants with XXSPLTI32DX.
+	(mov<mode>_hardfloat32, FMOVE64 iterator): Add support for loading
+	constants with XXSPLTI32DX.
+	(mov<mode>_hardfloat64, FMOVE64 iterator): Add support for loading
+	constants with XXSPLTI32DX.
+	* config/rs6000/rs6000.opt (-mxxsplti32dx): New switch.
+	* config/rs6000/vsx.md (UNSPEC_XXSPLTI32DX_CONST): New unspec.
+	(vsx_mov<mode>_64bit): Add support for loading constants with
+	XXSPLTI32DX.
+	(vsx_mov<mode>_32bit): Add support for loading constants with
+	XXSPLTI32DX.
+	(XXSPLTI32DX): New mode iterator.
+	(xxsplti32dx_<mode>): New insn and splits.
+	(xxsplti32dx_<mode>_first): New insns.
+	(xxsplti32dx_<mode>_second): New insns.
+
+work046.patch017:
+2021-04-07  Michael Meissner  <meissner@linux.ibm.com>
+
+	* config/rs6000/altivec.md (UNSPEC_XXEVAL): Move to vsx.md.
+	(xxeval): Move to vsx.md.
+	* config/rs6000/vsx.md (UNSPEC_XXEVAL): Move from altivec.md.
+	(xxeval): Move from altivec.md.
+
+
+work046.patch016:
+2021-04-07  Michael Meissner  <meissner@linux.ibm.com>
+
+	* config/rs6000/altivec.md (UNSPEC_XXPERMX): Move to vsx.md.
+	(xxpermx): Move to vsx.md.
+	(xxpermx_inst): Move to vsx.md.
+	* config/rs6000/vsx.md (UNSPEC_XXPERMX): Move from altivec.md.
+	(xxpermx): Move from altivec.md.
+	(xxpermx_inst): Move from altivec.md.
+
+
+work046.patch015:
+2021-04-07  Michael Meissner  <meissner@linux.ibm.com>
+
+	* config/rs6000/altivec.md (UNSPEC_XXSPLTI32DX): Move to vsx.md.
+	(xxsplti32dx_v4si): Move to vsx.md.
+	(xxsplti32dx_v4si_inst): Move to vsx.md.
+	(xxsplti32dx_v4sf): Move to vsx.md.
+	(xxsplti32dx_v4sf_inst): Move to vsx.md.
+	* config/rs6000/vsx.md (UNSPEC_XXSPLTI32DX): Move from
+	altivec.md.
+	(xxsplti32dx_v4si): Move from altivec.md.
+	(xxsplti32dx_v4si_inst): Move from altivec.md.
+	(xxsplti32dx_v4sf): Move from altivec.md.
+	(xxsplti32dx_v4sf_inst): Move from altivec.md.
+
 work046.patch013:
 2021-04-07  Michael Meissner  <meissner@linux.ibm.com>
 
diff --git a/gcc/testsuite/ChangeLog.meissner b/gcc/testsuite/ChangeLog.meissner
index c3653c3e65b..a846d7f1637 100644
--- a/gcc/testsuite/ChangeLog.meissner
+++ b/gcc/testsuite/ChangeLog.meissner
@@ -1,3 +1,8 @@
+work046.patch018:
+2021-04-08  Michael Meissner  <meissner@linux.ibm.com>
+
+	* gcc.target/powerpc/vec-splati-runnable.c: Update insn count.
+
 work046.patch014:
 2021-04-07  Michael Meissner  <meissner@linux.ibm.com>

[gcc(refs/users/meissner/heads/work046)] Update ChangeLog.meissner.

[Michael Meissner]

https://gcc.gnu.org/g:87df707604415bd3483be0f0c85af239d4ffe88e

commit 87df707604415bd3483be0f0c85af239d4ffe88e
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Wed Apr 7 15:15:44 2021 -0400

    Update ChangeLog.meissner.
    
    gcc/
    2021-04-07  Michael Meissner  <meissner@linux.ibm.com>
    
            * ChangeLog.meissner: Update.
    
    gcc/testsuite/
    2021-04-07  Michael Meissner  <meissner@linux.ibm.com>
    
            * ChangeLog.meissner: Update.

Diff:
---
 gcc/ChangeLog.meissner           | 41 ++++++++++++++++++++++++++++++++++++++++
 gcc/testsuite/ChangeLog.meissner |  7 +++++++
 2 files changed, 48 insertions(+)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index 37b8e863014..a8bb03c3fc5 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,44 @@
+work046.patch013:
+2021-04-07  Michael Meissner  <meissner@linux.ibm.com>
+
+	* config/rs6000/altivec.md (UNSPEC_XXSPLTID): Move to vsx.md and
+	rename to UNSPEC_XXSPLTID.
+	(xxspltidp_v2df): Move to vsx.md and re-implement.
+	(xxspltidp_v2df_inst): Move to vsx.md and re-implement.
+	* config/rs6000/constraints.md (eF): New constraint.
+	* config/rs6000/predicates.md (easy_fp_constant): If we load the
+	scalar constant with XXSPLTIDP, return true.
+	(xxspltidp_operand): New predicate.
+	(easy_vector_constant): If we can generate XXSPLTIDP, mark the
+	vector constant as easy.
+	* config/rs6000/rs6000-cpus.def (OTHER_POWER10_MASKS): Add
+	-mxxspltidp support.
+	(POWERPC_MASKS): Add -mxxspltidp support.
+	* config/rs6000/rs6000-protos.h (xxspltidp_constant_p): New
+	declaration.
+	* config/rs6000/rs6000.c (rs6000_option_override_internal): Add
+	-mxxspltidp support.
+	(xxspltidp_constant_p): New function.
+	(output_vec_const_move): Add support for XXSPLTIDP.
+	(rs6000_opt_masks): Add -mxxspltidp support.
+	(rs6000_emit_xxspltidp_v2df): Change function to implement the
+	XXSPLTIDP instruction.
+	* config/rs6000/rs6000.md (movsf_hardfloat): Add XXSPLTIDP
+	support.
+	(mov<mode>_hardfloat32, FMOVE64 iterator): Add XXSPLTIDP support.
+	(mov<mode>_hardfloat64, FMOVE64 iterator): Add XXSPLTIDP support.
+	* config/rs6000/rs6000.opt (-mxxspltidp): New switch.
+	* config/rs6000/vsx.md (UNSPEC_XXSPLTIDP): Move here from
+	altivec.md.  Rename it to UNSPEC_XXSPLTIDP to match the
+	instruction.
+	(vsx_mov<mode>_64bit): Add XXSPLTIDP support.
+	(vsx_mov<mode>_32bit): Add XXSPLTIDP support.
+	(XXSPLTIDP): New mode iterator.
+	(xxspltidp_<mode>_internal1): New define_insn_and_split.
+	(xxspltidp_<mode>_internal2): New define_insn.
+	(xxspltidp_v2df): Move to vsx.md from altivec.md.  Re-implement to
+	use the new constant format.
+
 work046.patch011:
 2021-04-07  Michael Meissner  <meissner@linux.ibm.com>
 
diff --git a/gcc/testsuite/ChangeLog.meissner b/gcc/testsuite/ChangeLog.meissner
index bd8b080479c..c3653c3e65b 100644
--- a/gcc/testsuite/ChangeLog.meissner
+++ b/gcc/testsuite/ChangeLog.meissner
@@ -1,3 +1,10 @@
+work046.patch014:
+2021-04-07  Michael Meissner  <meissner@linux.ibm.com>
+
+	* gcc.target/powerpc/vec-splat-constant-sf.c: New test.
+	* gcc.target/powerpc/vec-splat-constant-df.c: New test.
+	* gcc.target/powerpc/vec-splat-constant-v2df.c: New test.
+
 work046.patch012:
 2021-04-07  Michael Meissner  <meissner@linux.ibm.com>

[gcc(refs/users/meissner/heads/work046)] Update ChangeLog.meissner.

[Michael Meissner]

https://gcc.gnu.org/g:71692fe5e0e9d316561331a099280d4c87354cf0

commit 71692fe5e0e9d316561331a099280d4c87354cf0
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Wed Apr 7 13:26:37 2021 -0400

    Update ChangeLog.meissner.
    
    gcc/
    2021-04-07  Michael Meissner  <meissner@linux.ibm.com>
    
            * ChangeLog.meissner: Update.
    
    gcc/testsuite/
    2021-04-07  Michael Meissner  <meissner@linux.ibm.com>
    
            * ChangeLog.meissner: Update.

Diff:
---
 gcc/ChangeLog.meissner           | 36 ++++++++++++++++++++++++++++++++++++
 gcc/testsuite/ChangeLog.meissner |  9 +++++++++
 2 files changed, 45 insertions(+)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index 03eba52dd53..37b8e863014 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,39 @@
+work046.patch011:
+2021-04-07  Michael Meissner  <meissner@linux.ibm.com>
+
+	* config/rs6000/altivec.md (UNSPEC_XXSPLTIW): Move to vsx.md.
+	(xxspltiw_v4si): Move to vsx.md and re-implement.
+	(xxspltiw_v4sf): Move to vsx.md and re-implement.
+	(xxspltiw_v4sf_inst): Delete.
+	* config/rs6000/constraints.md (eW): New constraint.
+	* config/rs6000/predicates.md (xxspltiw_operand): New predicate.
+	(easy_vector_constant): If we can generate XXSPLTIW, mark the
+	vector constant as easy.
+	* config/rs6000/rs6000-cpus.def (OTHER_POWER10_MASKS): Add
+	-mxxspltiw support.
+	(POWERPC_MASKS): Add -mxxspltiw support.
+	* config/rs6000/rs6000-protos.h (xxspltiw_constant_p): New
+	declaration.
+	* config/rs6000/rs6000.c (rs6000_option_override_internal): Add
+	-mxxspltiw support.
+	(xxspltib_constant_p): If we can generate XXSPLTIW, don't generate
+	XXSPLTIB and a vector extend instruction.
+	(xxspltiw_constant_p): New function.
+	(output_vec_const_move): Add support for XXSPLTIW.
+	(rs6000_opt_masks): Add -mxxspltiw support.
+	* config/rs6000/rs6000.opt (-mxxspltiw): New switch.
+	* config/rs6000/vsx.md (UNSPEC_XXSPLTIW): Move here from
+	altivec.md.
+	(vsx_mov<mode>_64bit): Add XXSPLTIW support.
+	(vsx_mov<mode>_32bit): Add XXSPLTIW support.
+	(XXSPLTIW): New mode iterator.
+	(xxspltiw_<mode>_internal1): New define_insn_and_split.
+	(xxspltiw_<mode>_internal2): New define_insn.
+	(xxspltiw_v4si): Move to vsx.md from altivec.md.  Re-implement to
+	use the new constant format.
+	(xxspltiw_v4sf): Move to vsx.md from altivec.md.  Re-implement to
+	use the new constant format.
+
 work046.patch010:
 2021-04-07  Michael Meissner  <meissner@linux.ibm.com>
 
diff --git a/gcc/testsuite/ChangeLog.meissner b/gcc/testsuite/ChangeLog.meissner
index 6c4dec355bf..bd8b080479c 100644
--- a/gcc/testsuite/ChangeLog.meissner
+++ b/gcc/testsuite/ChangeLog.meissner
@@ -1,3 +1,12 @@
+work046.patch012:
+2021-04-07  Michael Meissner  <meissner@linux.ibm.com>
+
+	* gcc.target/powerpc/vec-splati-runnable.c: Set optimization level
+	to -O2.  Add missing abort call.  Update insn counts.
+	* gcc.target/powerpc/xxspltiw-v4sf.c: New test.
+	* gcc.target/powerpc/xxspltiw-v4si.c: New test.
+	* gcc.target/powerpc/xxspltiw-v8hi.c: New test.
+
 work046.patch005:
 2021-04-01  Michael Meissner  <meissner@linux.ibm.com>

[gcc(refs/users/meissner/heads/work046)] Update ChangeLog.meissner.

[Michael Meissner]

https://gcc.gnu.org/g:03a566c9388978a0fd5affed1b59fa83b769eadf

commit 03a566c9388978a0fd5affed1b59fa83b769eadf
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Wed Apr 7 10:54:05 2021 -0400

    Update ChangeLog.meissner.
    
    gcc/
    2021-04-07  Michael Meissner  <meissner@linux.ibm.com>
    
            * ChangeLog.meissner: Update.
    
    gcc/testsuite/
    2021-04-07  Michael Meissner  <meissner@linux.ibm.com>
    
            * ChangeLog.meissner: Update.
    
    libgcc/
    2021-04-07  Michael Meissner  <meissner@linux.ibm.com>
    
            * ChangeLog.meissner: Update.

Diff:
---
 gcc/ChangeLog.meissner           | 68 ++++++++++++++++++++++++++++++++++++++++
 gcc/testsuite/ChangeLog.meissner | 41 ++++++++++++++++++++++++
 libgcc/ChangeLog.meissner        |  6 ++++
 3 files changed, 115 insertions(+)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index 5409d726753..03eba52dd53 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,71 @@
+work046.patch010:
+2021-04-07  Michael Meissner  <meissner@linux.ibm.com>
+
+	* config/rs6000/rs6000-protos.h (rs6000_const_f32_to_i32): Change
+	return type to long.
+	* config/rs6000/rs6000.c (rs6000_const_f32_to_i32): Change return
+	type to long.
+
+work046.patch009:
+2021-04-07  Michael Meissner  <meissner@linux.ibm.com>
+
+	* config.gcc (powerpc*-*-*, rs6000-*-*): Do not set
+	LINK_OS_EXTRA_SPEC32 or LINK_OS_EXTRA_SPEC664 for the Advance
+	Toolchain.
+
+work046.patch007:
+2021-04-07  Michael Meissner  <meissner@linux.ibm.com>
+
+	* config/rs6000/rs6000-builtin.def (BU_IBM128_2): Rename
+	RS6000_BTM_IBM128 from RS6000_BTM_FLOAT128.
+	* config/rs6000/rs6000-call.c (rs6000_invalid_builtin): Update
+	error message for __ibm128 built-in functions.
+	(rs6000_init_builtins): Create the __ibm128 keyword on older
+	systems where long double uses the IBM extended double format,
+	even if they don't support IEEE 128-bit floating point.
+	* config/rs6000/rs6000.c (rs6000_builtin_mask_calculate): Rename
+	RS6000_BTM_IBM128 from RS6000_BTM_FLOAT128.
+	(rs6000_builtin_mask_names): Rename RS6000_BTM_IBM128 from
+	RS6000_BTM_FLOAT128.
+	* config/rs6000/rs6000.h (TARGET_IBM128): New macro.
+	(RS6000_BTM_IBM128): Rename from RS6000_BTM_FLOAT128.
+	(RS6000_BTM_COMMON): Rename RS6000_BTM_IBM128 from
+	RS6000_BTM_FLOAT128.
+
+work046.patch006:
+2021-04-07  Michael Meissner  <meissner@linux.ibm.com>
+
+	* config/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): If long
+	double is IEEE-128 map the nanq built-in functions to the long
+	double function, not the f128 function.
+
+work046.patch002:
+2021-04-07 Michael Meissner  <meissner@linux.ibm.com>
+
+        * config/rs6000/rs6000.c (have_compare_and_set_mask): Add IEEE
+        128-bit floating point types.
+        * config/rs6000/rs6000.md (FPMASK): New iterator.
+        (FPMASK2): New iterator.
+        (Fv mode attribute): Add KFmode and TFmode.
+        (mov<FPMASK:mode><FPMASK2:mode>cc_fpmask): Replace
+        mov<SFDF:mode><SFDF2:mode>cc_p9.  Add IEEE 128-bit fp support.
+        (mov<FPMASK:mode><FPMASK2:mode>cc_invert_fpmask): Replace
+        mov<SFDF:mode><SFDF2:mode>cc_invert_p9.  Add IEEE 128-bit fp
+        support.
+        (fpmask<mode>): Add IEEE 128-bit fp support.  Enable generator to
+        build te RTL.
+        (xxsel<mode>): Add IEEE 128-bit fp support.  Enable generator to
+        build te RTL.
+
+work046.patch001:
+2021-04-07  Michael Meissner  <meissner@linux.ibm.com>
+
+	* config/rs6000/rs6000.c (rs6000_emit_minmax): Add support for ISA
+	3.1 IEEE 128-bit floating point xsmaxcqp and xsmincqp instructions.
+	* config/rs6000/rs60000.h (FLOAT128_MIN_MAX_FPMASK_P): New macro.
+	* config/rs6000/rs6000.md (s<minmax><mode>3): Add support for the
+	ISA 3.1 IEEE 128-bit minimum and maximum instructions.
+
 2021-04-07   Michael Meissner  <meissner@linux.ibm.com>
 
 	Clone branch
diff --git a/gcc/testsuite/ChangeLog.meissner b/gcc/testsuite/ChangeLog.meissner
index 5409d726753..6c4dec355bf 100644
--- a/gcc/testsuite/ChangeLog.meissner
+++ b/gcc/testsuite/ChangeLog.meissner
@@ -1,3 +1,44 @@
+work046.patch005:
+2021-04-01  Michael Meissner  <meissner@linux.ibm.com>
+
+	* c-c++-common/dfp/convert-bfp-11.c: Force using IBM 128-bit long
+	double.  Remove check for 64-bit long double.
+
+work046.patch004:
+2021-04-07  Michael Meissner  <meissner@linux.ibm.com>
+
+	PR target/70117
+	* gcc.target/powerpc/pr70117.c: Force the long double type to use
+	the IBM 128-bit format.
+
+work046.patch003:
+2021-04-07  Michael Meissner  <meissner@linux.ibm.com>
+
+	* lib/target-supports.exp
+	(check_effective_target_ppc_long_double_ibm128): New function.
+	(check_effective_target_ppc_long_double_ieee128): New function.
+	(check_effective_target_ppc_long_double_64bit): New function.
+	(add_options_for_ppc_long_double_override_ibm128): New function.
+	(check_effective_target_ppc_long_double_override_ibm128): New
+	function.
+	(add_options_for_ppc_long_double_override_ieee128): New function.
+	(check_effective_target_ppc_long_double_override_ieee128): New
+	function.
+	(add_options_for_ppc_long_double_override_64bit): New function.
+	(check_effective_target_ppc_long_double_override_64bit): New
+	function.
+
+work046.patch002:
+2021-04-07  Michael Meissner  <meissner@linux.ibm.com>
+
+        * gcc.target/powerpc/float128-cmove.c: New test.
+        * gcc.target/powerpc/float128-minmax-3.c: New test.
+
+work046.patch001:
+2021-04-07  Michael Meissner  <meissner@linux.ibm.com>
+
+	* gcc.target/powerpc/float128-minmax-2.c: New test.
+
 2021-04-07   Michael Meissner  <meissner@linux.ibm.com>
 
 	Clone branch
diff --git a/libgcc/ChangeLog.meissner b/libgcc/ChangeLog.meissner
index 5409d726753..5cf3f455cbe 100644
--- a/libgcc/ChangeLog.meissner
+++ b/libgcc/ChangeLog.meissner
@@ -1,3 +1,9 @@
+work046.patch008:
+2021-04-07  Michael Meissner  <meissner@linux.ibm.com>
+
+	* config/rs6000/ibm-ldouble.c (pack_ldouble): Use
+	__builtin_pack_ibm128 instead of __builtin_pack_longdouble.
+
 2021-04-07   Michael Meissner  <meissner@linux.ibm.com>
 
 	Clone branch