[gcc r11-8506] arm: Fix ICE with CMSE nonsecure calls on Armv8.1-M [PR100333]

[gcc r11-8506] arm: Fix ICE with CMSE nonsecure calls on Armv8.1-M [PR100333]

[Alex Coplan]

https://gcc.gnu.org/g:e58539d965059994ebac606ae7533e857bbe199f

commit r11-8506-ge58539d965059994ebac606ae7533e857bbe199f
Author: Alex Coplan <alex.coplan@arm.com>
Date:   Wed May 19 15:52:45 2021 +0100

    arm: Fix ICE with CMSE nonsecure calls on Armv8.1-M [PR100333]
    
    As the PR shows, we ICE shortly after expanding nonsecure calls for Armv8.1-M.
    For Armv8.1-M, we have TARGET_HAVE_FPCXT_CMSE. As it stands, the expander
    (arm.md:nonsecure_call_internal) moves the callee's address to a register (with
    copy_to_suggested_reg) only if !TARGET_HAVE_FPCXT_CMSE.
    
    However, looking at the pattern which the insn appears to be intended to
    match (thumb2.md:*nonsecure_call_reg_thumb2_fpcxt), it requires the
    callee's address to be in a register.
    
    This patch therefore just forces the callee's address into a register in
    the expander.
    
    gcc/ChangeLog:
    
            PR target/100333
            * config/arm/arm.md (nonsecure_call_internal): Always ensure
            callee's address is in a register.
    
    gcc/testsuite/ChangeLog:
    
            PR target/100333
            * gcc.target/arm/cmse/pr100333.c: New test.
    
    (cherry picked from commit 5b953740da1976d90d974055c6d825c509c6e654)

Diff:
---
 gcc/config/arm/arm.md                        | 19 +++++++++++--------
 gcc/testsuite/gcc.target/arm/cmse/pr100333.c |  7 +++++++
 2 files changed, 18 insertions(+), 8 deletions(-)

diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
index 45a471a887a..064604808cc 100644
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -8580,18 +8580,21 @@
 	      (use (match_operand 2 "" ""))
 	      (clobber (reg:SI LR_REGNUM))])]
   "use_cmse"
-  "
   {
+    rtx addr = XEXP (operands[0], 0);
+    rtx tmp = REG_P (addr) ? addr : force_reg (SImode, addr);
+
     if (!TARGET_HAVE_FPCXT_CMSE)
       {
-	rtx tmp =
-	  copy_to_suggested_reg (XEXP (operands[0], 0),
-				 gen_rtx_REG (SImode, R4_REGNUM),
-				 SImode);
-
-	operands[0] = replace_equiv_address (operands[0], tmp);
+	rtx r4 = gen_rtx_REG (SImode, R4_REGNUM);
+	emit_move_insn (r4, tmp);
+	tmp = r4;
       }
-  }")
+
+    if (tmp != addr)
+      operands[0] = replace_equiv_address (operands[0], tmp);
+  }
+)
 
 (define_insn "*call_reg_armv5"
   [(call (mem:SI (match_operand:SI 0 "s_register_operand" "r"))
diff --git a/gcc/testsuite/gcc.target/arm/cmse/pr100333.c b/gcc/testsuite/gcc.target/arm/cmse/pr100333.c
new file mode 100644
index 00000000000..d8e3d809f73
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/cmse/pr100333.c
@@ -0,0 +1,7 @@
+/* { dg-do compile } */
+/* { dg-additional-options "-mcmse" } */
+typedef void __attribute__((cmse_nonsecure_call)) t(void);
+t g;
+void f() {
+  g();
+}