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* [gcc(refs/users/meissner/heads/work055)] PR 100167: Fix tests when running on power10.
@ 2021-06-09  4:23 Michael Meissner
  0 siblings, 0 replies; only message in thread
From: Michael Meissner @ 2021-06-09  4:23 UTC (permalink / raw)
  To: gcc-cvs

https://gcc.gnu.org/g:ac223a1d439c856207a3cd8fab234b5a4de0c169

commit ac223a1d439c856207a3cd8fab234b5a4de0c169
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Wed Jun 9 00:23:02 2021 -0400

    PR 100167: Fix tests when running on power10.
    
    This patch updates the vector long long multiply and divide tests to
    supply the correct code information if power10 code generation is used.
    
    gcc/testsuite/
    2021-06-09  Michael Meissner  <meissner@linux.ibm.com>
    
            PR testsuite/100167
            * gcc.target/powerpc/fold-vec-div-longlong.c:
            * gcc.target/powerpc/fold-vec-mult-longlong.c: Disable power10
            code generation.

Diff:
---
 gcc/testsuite/gcc.target/powerpc/fold-vec-div-longlong.c  | 7 +++++--
 gcc/testsuite/gcc.target/powerpc/fold-vec-mult-longlong.c | 3 ++-
 2 files changed, 7 insertions(+), 3 deletions(-)

diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-div-longlong.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-div-longlong.c
index 312e984d3cc..8a64814afa0 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-div-longlong.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-div-longlong.c
@@ -19,5 +19,8 @@ test6 (vector unsigned long long x, vector unsigned long long y)
 {
   return vec_div (x, y);
 }
-/* { dg-final { scan-assembler-times {\mdivd\M} 2 } } */
-/* { dg-final { scan-assembler-times {\mdivdu\M} 2 } } */
+
+/* { dg-final { scan-assembler-times {\mdivd\M}   2 { target { !has_arch_pwr10 } } } } */
+/* { dg-final { scan-assembler-times {\mdivdu\M}  2 { target { !has_arch_pwr10 } } } } */
+/* { dg-final { scan-assembler-times {\mvdivsd\M} 1 { target {  has_arch_pwr10 } } } } */
+/* { dg-final { scan-assembler-times {\mvdivud\M} 1 { target {  has_arch_pwr10 } } } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-longlong.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-longlong.c
index 38dba9f5023..f18fbd0d09b 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-longlong.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-longlong.c
@@ -20,5 +20,6 @@ test6 (vector unsigned long long x, vector unsigned long long y)
   return vec_mul (x, y);
 }
 
-/* { dg-final { scan-assembler-times "\[ \t\]mulld " 4 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mmulld\M}  4 { target { lp64 && ! has_arch_pwr10 } } } } */
+/* { dg-final { scan-assembler-times {\mvmulld\M} 1 { target { has_arch_pwr10           } } } } */


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