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* [gcc(refs/users/meissner/heads/work064)] Fix xxeval predicates (PR 99921).
@ 2021-08-13 1:55 Michael Meissner
0 siblings, 0 replies; 2+ messages in thread
From: Michael Meissner @ 2021-08-13 1:55 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:8f91e6426176ce0309517ed9614dd125f380da52
commit 8f91e6426176ce0309517ed9614dd125f380da52
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Thu Aug 12 21:54:20 2021 -0400
Fix xxeval predicates (PR 99921).
I noticed that the xxeval built-in function used the altivec_register_operand
predicate. Since it takes vsx registers, this might force the register
allocate to issue a move when it could use a traditional floating point
register. This patch fixes that.
2021-08-12 Michael Meissner <meissner@linux.ibm.com>
gcc/
PR target/99921
* config/rs6000/altivec.md (xxeval): Use register_predicate
instead of altivec_register_predicate.
Diff:
---
gcc/config/rs6000/altivec.md | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/gcc/config/rs6000/altivec.md b/gcc/config/rs6000/altivec.md
index d70c17e6bc2..fd86c300981 100644
--- a/gcc/config/rs6000/altivec.md
+++ b/gcc/config/rs6000/altivec.md
@@ -3875,9 +3875,9 @@
(define_insn "xxeval"
[(set (match_operand:V2DI 0 "register_operand" "=wa")
- (unspec:V2DI [(match_operand:V2DI 1 "altivec_register_operand" "wa")
- (match_operand:V2DI 2 "altivec_register_operand" "wa")
- (match_operand:V2DI 3 "altivec_register_operand" "wa")
+ (unspec:V2DI [(match_operand:V2DI 1 "register_operand" "wa")
+ (match_operand:V2DI 2 "register_operand" "wa")
+ (match_operand:V2DI 3 "register_operand" "wa")
(match_operand:QI 4 "u8bit_cint_operand" "n")]
UNSPEC_XXEVAL))]
"TARGET_POWER10"
^ permalink raw reply [flat|nested] 2+ messages in thread
* [gcc(refs/users/meissner/heads/work064)] Fix xxeval predicates (PR 99921).
@ 2021-08-13 1:25 Michael Meissner
0 siblings, 0 replies; 2+ messages in thread
From: Michael Meissner @ 2021-08-13 1:25 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:a9fefa72bba5925f244e1e3ef103dc69bd11959d
commit a9fefa72bba5925f244e1e3ef103dc69bd11959d
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Thu Aug 12 21:25:07 2021 -0400
Fix xxeval predicates (PR 99921).
I noticed that the xxeval built-in function used the altivec_register_operand
predicate. Since it takes vsx registers, this might force the register
allocate to issue a move when it could use a traditional floating point
register. This patch fixes that.
2021-08-12 Michael Meissner <meissner@linux.ibm.com>
gcc/
PR target/99921
* config/rs6000/altivec.md (xxeval): Use register_predicate
instead of altivec_register_predicate.
---
gcc/config/rs6000/altivec.md | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/gcc/config/rs6000/altivec.md b/gcc/config/rs6000/altivec.md
index d70c17e6bc2..fd86c300981 100644
--- a/gcc/config/rs6000/altivec.md
+++ b/gcc/config/rs6000/altivec.md
@@ -3875,9 +3875,9 @@ (define_insn "vperm_v16qiv8hi"
(define_insn "xxeval"
[(set (match_operand:V2DI 0 "register_operand" "=wa")
- (unspec:V2DI [(match_operand:V2DI 1 "altivec_register_operand" "wa")
- (match_operand:V2DI 2 "altivec_register_operand" "wa")
- (match_operand:V2DI 3 "altivec_register_operand" "wa")
+ (unspec:V2DI [(match_operand:V2DI 1 "register_operand" "wa")
+ (match_operand:V2DI 2 "register_operand" "wa")
+ (match_operand:V2DI 3 "register_operand" "wa")
(match_operand:QI 4 "u8bit_cint_operand" "n")]
UNSPEC_XXEVAL))]
"TARGET_POWER10"
--
2.31.1
Diff:
---
gcc/config/rs6000/altivec.md | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/gcc/config/rs6000/altivec.md b/gcc/config/rs6000/altivec.md
index d70c17e6bc2..fd86c300981 100644
--- a/gcc/config/rs6000/altivec.md
+++ b/gcc/config/rs6000/altivec.md
@@ -3875,9 +3875,9 @@
(define_insn "xxeval"
[(set (match_operand:V2DI 0 "register_operand" "=wa")
- (unspec:V2DI [(match_operand:V2DI 1 "altivec_register_operand" "wa")
- (match_operand:V2DI 2 "altivec_register_operand" "wa")
- (match_operand:V2DI 3 "altivec_register_operand" "wa")
+ (unspec:V2DI [(match_operand:V2DI 1 "register_operand" "wa")
+ (match_operand:V2DI 2 "register_operand" "wa")
+ (match_operand:V2DI 3 "register_operand" "wa")
(match_operand:QI 4 "u8bit_cint_operand" "n")]
UNSPEC_XXEVAL))]
"TARGET_POWER10"
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