[gcc(refs/users/acsawdey/heads/reassoc-new)] return 2 for VEC_PERM_EXPR, change hook to allow op count

[gcc(refs/users/acsawdey/heads/reassoc-new)] return 2 for VEC_PERM_EXPR, change hook to allow op count

[Aaron Sawdey]

https://gcc.gnu.org/g:cb9154ee011630cd2b5682eaac69309e105bd079

commit cb9154ee011630cd2b5682eaac69309e105bd079
Author: Aaron Sawdey <acsawdey@linux.ibm.com>
Date:   Wed Aug 18 13:01:44 2021 -0500

    return 2 for VEC_PERM_EXPR, change hook to allow op count

Diff:
---
 gcc/config/rs6000/rs6000.c | 21 +++++++++++++--------
 gcc/doc/tm.texi            |  2 +-
 gcc/target.def             |  2 +-
 gcc/tree-ssa-reassoc.c     |  2 +-
 gcc/tree-vect-data-refs.c  |  2 +-
 5 files changed, 17 insertions(+), 12 deletions(-)

diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index 152d2543d5f..8ee7502df67 100644
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -9935,11 +9935,11 @@ rs6000_offsettable_memref_p (rtx op, machine_mode reg_mode, bool strict)
 */
  
 static int
-rs6000_reassociation_width (unsigned int opc_in, machine_mode mode)
+rs6000_reassociation_width (unsigned int opc_in, machine_mode mode,
+			    unsigned int num_op ATTRIBUTE_UNUSED)
 {
   tree_code opc = (tree_code)opc_in;
-  int size = GET_MODE_SIZE (mode);
-  bool isPlus=false, isMult=false, isLogical=false;
+  bool isPlus=false, isMult=false;
   switch (opc)
     {
     case PLUS_EXPR:
@@ -9948,17 +9948,18 @@ rs6000_reassociation_width (unsigned int opc_in, machine_mode mode)
     case MULT_EXPR:
       isMult=true;
       break;
-    case BIT_IOR_EXPR:
-    case BIT_XOR_EXPR:
-    case BIT_AND_EXPR:
-      isLogical=true;
-      break;
     default:
       break;
     }
   switch (rs6000_tune)
     {
     case PROCESSOR_POWER8:
+      /* This is used in vect_transform_grouped_load() to determine if vector
+	 instructions can be executed in parallel.  In particular it is looking
+	 to see whether it can do extract even/odd instructions in parallel so
+	 it can use vect_permute_load_chain().  */
+      if (opc == VEC_PERM_EXPR)
+	return 2;
       switch (mode)
 	{
 	case E_DDmode:
@@ -9994,6 +9995,8 @@ rs6000_reassociation_width (unsigned int opc_in, machine_mode mode)
 	}
       break;
     case PROCESSOR_POWER9:
+      if (opc == VEC_PERM_EXPR)
+	return 2;
       switch (mode)
 	{
 	case E_DDmode:
@@ -10032,6 +10035,8 @@ rs6000_reassociation_width (unsigned int opc_in, machine_mode mode)
 	}
       break;
     case PROCESSOR_POWER10:
+      if (opc == VEC_PERM_EXPR)
+	return 2;
       switch (mode)
 	{
 	case E_DDmode:
diff --git a/gcc/doc/tm.texi b/gcc/doc/tm.texi
index a30fdcbbf3d..f3028227007 100644
--- a/gcc/doc/tm.texi
+++ b/gcc/doc/tm.texi
@@ -7518,7 +7518,7 @@ the order of instructions is important for correctness when scheduling, but
 also the latencies of operations.
 @end deftypevr
 
-@deftypefn {Target Hook} int TARGET_SCHED_REASSOCIATION_WIDTH (unsigned int @var{opc}, machine_mode @var{mode})
+@deftypefn {Target Hook} int TARGET_SCHED_REASSOCIATION_WIDTH (unsigned int @var{opc}, machine_mode @var{mode}, unsigned int @var{num_op})
 This hook is called by tree reassociator to determine a level of
 parallelism required in output calculations chain.
 @end deftypefn
diff --git a/gcc/target.def b/gcc/target.def
index 7676d5e626e..dd0fb99194d 100644
--- a/gcc/target.def
+++ b/gcc/target.def
@@ -1535,7 +1535,7 @@ DEFHOOK
 (reassociation_width,
 "This hook is called by tree reassociator to determine a level of\n\
 parallelism required in output calculations chain.",
-int, (unsigned int opc, machine_mode mode),
+int, (unsigned int opc, machine_mode mode, unsigned int num_op),
 hook_int_uint_mode_1)
 
 /* The following member value is a function that returns priority for
diff --git a/gcc/tree-ssa-reassoc.c b/gcc/tree-ssa-reassoc.c
index 8498cfc7aa8..8a38a3af02c 100644
--- a/gcc/tree-ssa-reassoc.c
+++ b/gcc/tree-ssa-reassoc.c
@@ -5291,7 +5291,7 @@ get_reassociation_width (int ops_num, enum tree_code opc,
   if (param_width > 0)
     width = param_width;
   else
-    width = targetm.sched.reassociation_width (opc, mode);
+    width = targetm.sched.reassociation_width (opc, mode, ops_num);
 
   if (width == 1)
     return width;
diff --git a/gcc/tree-vect-data-refs.c b/gcc/tree-vect-data-refs.c
index d594c0a1b1e..1ae73aa37ad 100644
--- a/gcc/tree-vect-data-refs.c
+++ b/gcc/tree-vect-data-refs.c
@@ -6463,7 +6463,7 @@ vect_transform_grouped_load (vec_info *vinfo, stmt_vec_info stmt_info,
      execute 2 or more vector instructions in parallel.  Otherwise try to
      get chain for loads group using vect_shift_permute_load_chain.  */
   mode = TYPE_MODE (STMT_VINFO_VECTYPE (stmt_info));
-  if (targetm.sched.reassociation_width (VEC_PERM_EXPR, mode) > 1
+  if (targetm.sched.reassociation_width (VEC_PERM_EXPR, mode, size) > 1
       || pow2p_hwi (size)
       || !vect_shift_permute_load_chain (vinfo, dr_chain, size, stmt_info,
 					 gsi, &result_chain))