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* [gcc r9-9692] Daily bump.
@ 2021-08-24 0:20 GCC Administrator
0 siblings, 0 replies; only message in thread
From: GCC Administrator @ 2021-08-24 0:20 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:9d007db0c5f02fd42788f9f7f4c9cf72ec44f131
commit r9-9692-g9d007db0c5f02fd42788f9f7f4c9cf72ec44f131
Author: GCC Administrator <gccadmin@gcc.gnu.org>
Date: Tue Aug 24 00:19:43 2021 +0000
Daily bump.
Diff:
---
gcc/ChangeLog | 62 +++++++++++++++++++++++++++++++++++++++++++++++++
gcc/DATESTAMP | 2 +-
gcc/testsuite/ChangeLog | 23 ++++++++++++++++++
3 files changed, 86 insertions(+), 1 deletion(-)
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 4a416485e2e..6d67d492020 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,65 @@
+2021-08-23 Richard Earnshaw <rearnsha@arm.com>
+
+ Backported from master:
+ 2021-08-05 Richard Earnshaw <rearnsha@arm.com>
+
+ PR target/101723
+ * config/arm/arm-cpus.in (quirk_no_asmcpu): New feature bit.
+ (ALL_QUIRKS): Add it.
+ (generic-armv7-a): Add quirk to suppress writing .cpu directive in
+ asm output.
+ * config/arm/arm.c (arm_identify_fpu_from_isa): New variable.
+ (arm_last_printed_arch_string): Delete.
+ (arm_last-printed_fpu_string): Delete.
+ (arm_configure_build_target): If use of floating-point/SIMD is
+ disabled, remove all fp/simd related features from the target ISA.
+ (last_arm_targ_options): New variable.
+ (arm_print_asm_arch_directives): Add new parameters. Change order
+ of emitted directives and handle all cases here.
+ (arm_file_start): Always call arm_print_asm_arch_directives, move
+ all generation of .arch/.arch_extension here.
+ (arm_file_end): Call arm_print_asm_arch.
+ (arm_declare_function_name): Call arm_print_asm_arch_directives
+ instead of printing .arch/.fpu directives directly.
+
+2021-08-23 Richard Earnshaw <rearnsha@arm.com>
+
+ Backported from master:
+ 2021-08-05 Richard Earnshaw <rearnsha@arm.com>
+
+ * config/arm/arm.c (arm_configure_build_target): Don't call
+ arm_option_reconfigure_globals.
+ (arm_option_restore): Call arm_option_reconfigure_globals after
+ reconfiguring the target.
+ * config/arm/arm-c.c (arm_pragma_target_parse): Likewise.
+
+2021-08-23 Richard Earnshaw <rearnsha@arm.com>
+
+ Backported from master:
+ 2021-08-05 Richard Earnshaw <rearnsha@arm.com>
+
+ * config/arm/arm.c (arm_configure_build_target): Ensure the target's
+ arch_name is always set.
+
+2021-08-23 Richard Earnshaw <rearnsha@arm.com>
+
+ Backported from master:
+ 2019-12-11 Richard Earnshaw <rearnsha@arm.com>
+
+ * config/arm/arm-cpus.in (ALL_SIMD_EXTERNAL): New fgroup.
+ (ALL_SIMD): Use it.
+ (ALL_FPU_EXTERNAL): New fgroup.
+ (ALL_FP): Use it.
+ (cortex-a55, cortex-a75, cortex-a76): Remove redundant
+ +simd from architecture specification.
+ (neoverse-n1, cortex-a75.cortex-a55): Likewise.
+ * config/arm/arm.c (isa_all_fpubits, fpu_bitlist): Rename to ...
+ (isa_all_fpubits_internal, fpu_bitlist_internal): ... these.
+ (isa_all_fpbits): New bitmap.
+ (arm_option_override): Initialize it.
+ (arm_configure_build_target): If the target isa does not have any
+ FP enabled, do not warn about mismatches in FP-related feature bits.
+
2021-08-19 Richard Earnshaw <rearnsha@arm.com>
Backported from master:
diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index d2e7bda3ede..83a5291efec 100644
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20210823
+20210824
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 60e5c37d1a6..76999c3410f 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,26 @@
+2021-08-23 Christophe Lyon <christophe.lyon@foss.st.com>
+
+ Backported from master:
+ 2021-08-06 Christophe Lyon <christophe.lyon@foss.st.com>
+
+ PR target/101723
+ * gcc.target/arm/pr69245.c: Make sure to emit code for fn1, fix
+ typo.
+
+2021-08-23 Richard Earnshaw <rearnsha@arm.com>
+
+ Backported from master:
+ 2021-08-05 Richard Earnshaw <rearnsha@arm.com>
+
+ PR target/101723
+ * gcc.target/arm/attr-neon.c: Tighten scan-assembler tests.
+ * gcc.target/arm/attr-neon2.c: Likewise.
+ * gcc.target/arm/attr-neon3.c: Likewise.
+ * gcc.target/arm/pr69245.c: Tighten scan-assembler match, but allow
+ multiple instances.
+ * gcc.target/arm/pragma_fpu_attribute.c: Likewise.
+ * gcc.target/arm/pragma_fpu_attribute_2.c: Likewise.
+
2021-08-19 Thomas Schwinge <thomas@codesourcery.com>
Backported from master:
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