public inbox for gcc-cvs@sourceware.org
help / color / mirror / Atom feed
* [gcc r12-3111] arm: testsuite: improve detection of CMSE hardware.
@ 2021-08-24 10:58 Richard Earnshaw
0 siblings, 0 replies; only message in thread
From: Richard Earnshaw @ 2021-08-24 10:58 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:79fb2700bdbab4212346d907be6063c5a32d3836
commit r12-3111-g79fb2700bdbab4212346d907be6063c5a32d3836
Author: Richard Earnshaw <rearnsha@arm.com>
Date: Fri Jun 18 17:13:04 2021 +0100
arm: testsuite: improve detection of CMSE hardware.
The test for CMSE support being available in hardware currently
relies on the compiler not optimizing away a secure gateway operation.
But even that is suspect, because the SG instruction is just a NOP
on armv8-m implementations that do not support the security extension.
Replace the existing test with a new one that reads and checks
the appropriate hardware feature register (memory mapped). This has
to be run from secure mode, but that shouldn't matter, because if we
can't do that we can't really test the CMSE extensions anyway. We
retain the SG instruction to ensure the test can't pass accidentally
if run on pre-armv8-m devices.
gcc/testsuite:
* lib/target-supports.exp (check_effective_target_arm_cmse_hw):
Check the CMSE feature register, rather than relying on the
SG operation causing an execution fault.
Diff:
---
gcc/testsuite/lib/target-supports.exp | 15 ++++++++-------
1 file changed, 8 insertions(+), 7 deletions(-)
diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index 66ce48d7dfd..06f5b1eb54d 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -4878,15 +4878,16 @@ proc check_effective_target_arm_cmse_ok {} {
proc check_effective_target_arm_cmse_hw { } {
return [check_runtime arm_cmse_hw_available {
- int __attribute__ ((cmse_nonsecure_entry)) ns_func(void)
- {
- return 0;
- }
int main (void)
{
- return ns_func();
- }
- } "-mcmse -Wl,--section-start,.gnu.sgstubs=0x00400000"]
+ unsigned id_pfr1;
+ asm ("ldr\t%0, =0xe000ed44\n" \
+ "ldr\t%0, [%0]\n" \
+ "sg" : "=l" (id_pfr1));
+ /* Exit with code 0 iff security extension is available. */
+ return !(id_pfr1 & 0xf0);
+ }
+ } "-mcmse"]
}
# Return 1 if the target supports executing MVE instructions, 0
# otherwise.
^ permalink raw reply [flat|nested] only message in thread
only message in thread, other threads:[~2021-08-24 10:58 UTC | newest]
Thread overview: (only message) (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-08-24 10:58 [gcc r12-3111] arm: testsuite: improve detection of CMSE hardware Richard Earnshaw
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).