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* [gcc r12-3510] AVX512FP16: Add testcase for fpclass/getmant/getexp instructions.
@ 2021-09-14 4:35 hongtao Liu
0 siblings, 0 replies; only message in thread
From: hongtao Liu @ 2021-09-14 4:35 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:ebcdd004edfcd79788e044ac2a4e4d7bb3e01888
commit r12-3510-gebcdd004edfcd79788e044ac2a4e4d7bb3e01888
Author: liuhongt <hongtao.liu@intel.com>
Date: Mon Mar 2 17:11:17 2020 +0800
AVX512FP16: Add testcase for fpclass/getmant/getexp instructions.
gcc/testsuite/ChangeLog:
* gcc.target/i386/avx512fp16-helper.h (V512):
Add xmm component.
* gcc.target/i386/avx512fp16-vfpclassph-1a.c: New test.
* gcc.target/i386/avx512fp16-vfpclassph-1b.c: Ditto.
* gcc.target/i386/avx512fp16-vfpclasssh-1a.c: Ditto.
* gcc.target/i386/avx512fp16-vfpclasssh-1b.c: Ditto.
* gcc.target/i386/avx512fp16-vgetexpph-1a.c: Ditto.
* gcc.target/i386/avx512fp16-vgetexpph-1b.c: Ditto.
* gcc.target/i386/avx512fp16-vgetexpsh-1a.c: Ditto.
* gcc.target/i386/avx512fp16-vgetexpsh-1b.c: Ditto.
* gcc.target/i386/avx512fp16-vgetmantph-1a.c: Ditto.
* gcc.target/i386/avx512fp16-vgetmantph-1b.c: Ditto.
* gcc.target/i386/avx512fp16-vgetmantsh-1a.c: Ditto.
* gcc.target/i386/avx512fp16-vgetmantsh-1b.c: Ditto.
* gcc.target/i386/avx512fp16vl-vfpclassph-1a.c: Ditto.
* gcc.target/i386/avx512fp16vl-vfpclassph-1b.c: Ditto.
* gcc.target/i386/avx512fp16vl-vgetexpph-1a.c: Ditto.
* gcc.target/i386/avx512fp16vl-vgetexpph-1b.c: Ditto.
* gcc.target/i386/avx512fp16vl-vgetmantph-1a.c: Ditto.
* gcc.target/i386/avx512fp16vl-vgetmantph-1b.c: Ditto.
Diff:
---
gcc/testsuite/gcc.target/i386/avx512fp16-helper.h | 1 +
.../gcc.target/i386/avx512fp16-vfpclassph-1a.c | 16 ++++
.../gcc.target/i386/avx512fp16-vfpclassph-1b.c | 77 ++++++++++++++++
.../gcc.target/i386/avx512fp16-vfpclasssh-1a.c | 16 ++++
.../gcc.target/i386/avx512fp16-vfpclasssh-1b.c | 76 +++++++++++++++
.../gcc.target/i386/avx512fp16-vgetexpph-1a.c | 24 +++++
.../gcc.target/i386/avx512fp16-vgetexpph-1b.c | 99 ++++++++++++++++++++
.../gcc.target/i386/avx512fp16-vgetexpsh-1a.c | 24 +++++
.../gcc.target/i386/avx512fp16-vgetexpsh-1b.c | 61 ++++++++++++
.../gcc.target/i386/avx512fp16-vgetmantph-1a.c | 24 +++++
.../gcc.target/i386/avx512fp16-vgetmantph-1b.c | 102 +++++++++++++++++++++
.../gcc.target/i386/avx512fp16-vgetmantsh-1a.c | 24 +++++
.../gcc.target/i386/avx512fp16-vgetmantsh-1b.c | 62 +++++++++++++
.../gcc.target/i386/avx512fp16vl-vfpclassph-1a.c | 22 +++++
.../gcc.target/i386/avx512fp16vl-vfpclassph-1b.c | 16 ++++
.../gcc.target/i386/avx512fp16vl-vgetexpph-1a.c | 26 ++++++
.../gcc.target/i386/avx512fp16vl-vgetexpph-1b.c | 16 ++++
.../gcc.target/i386/avx512fp16vl-vgetmantph-1a.c | 30 ++++++
.../gcc.target/i386/avx512fp16vl-vgetmantph-1b.c | 16 ++++
19 files changed, 732 insertions(+)
diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-helper.h b/gcc/testsuite/gcc.target/i386/avx512fp16-helper.h
index ec88888532c..f6f46872c35 100644
--- a/gcc/testsuite/gcc.target/i386/avx512fp16-helper.h
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16-helper.h
@@ -29,6 +29,7 @@ typedef union
__m256h ymmh[2];
__m256i ymmi[2];
__m128h xmmh[4];
+ __m128 xmm[4];
unsigned short u16[32];
unsigned int u32[16];
float f32[16];
diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vfpclassph-1a.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vfpclassph-1a.c
new file mode 100644
index 00000000000..a97dddf6110
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vfpclassph-1a.c
@@ -0,0 +1,16 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512fp16 -O2" } */
+/* { dg-final { scan-assembler-times "vfpclassphz\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n^k\]*%k\[0-7\](?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vfpclassphz\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n^k\]*%k\[0-7\]\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512h x512;
+volatile __mmask16 m32;
+
+void extern
+avx512dq_test (void)
+{
+ m32 = _mm512_fpclass_ph_mask (x512, 13);
+ m32 = _mm512_mask_fpclass_ph_mask (2, x512, 13);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vfpclassph-1b.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vfpclassph-1b.c
new file mode 100644
index 00000000000..9ffb5606b81
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vfpclassph-1b.c
@@ -0,0 +1,77 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512fp16" } */
+/* { dg-require-effective-target avx512fp16 } */
+
+#define AVX512FP16
+#include "avx512f-helper.h"
+
+#include <math.h>
+#include <limits.h>
+#include <float.h>
+#include "avx512f-mask-type.h"
+#define SIZE (AVX512F_LEN / 16)
+
+#ifndef __FPCLASSPH__
+#define __FPCLASSPH__
+int check_fp_class_hp (_Float16 src, int imm)
+{
+ int qNaN_res = isnan (src);
+ int sNaN_res = isnan (src);
+ int Pzero_res = (src == 0.0);
+ int Nzero_res = (src == -0.0);
+ int PInf_res = (isinf (src) == 1);
+ int NInf_res = (isinf (src) == -1);
+ int Denorm_res = (fpclassify (src) == FP_SUBNORMAL);
+ int FinNeg_res = __builtin_finite (src) && (src < 0);
+
+ int result = (((imm & 1) && qNaN_res)
+ || (((imm >> 1) & 1) && Pzero_res)
+ || (((imm >> 2) & 1) && Nzero_res)
+ || (((imm >> 3) & 1) && PInf_res)
+ || (((imm >> 4) & 1) && NInf_res)
+ || (((imm >> 5) & 1) && Denorm_res)
+ || (((imm >> 6) & 1) && FinNeg_res)
+ || (((imm >> 7) & 1) && sNaN_res));
+ return result;
+}
+#endif
+
+MASK_TYPE
+CALC (_Float16 *s1, int imm)
+{
+ int i;
+ MASK_TYPE res = 0;
+
+ for (i = 0; i < SIZE; i++)
+ if (check_fp_class_hp(s1[i], imm))
+ res = res | (1 << i);
+
+ return res;
+}
+
+void
+TEST (void)
+{
+ int i;
+ UNION_TYPE (AVX512F_LEN, h) src;
+ MASK_TYPE res1, res2, res_ref = 0;
+ MASK_TYPE mask = MASK_VALUE;
+
+ src.a[0] = NAN;
+ src.a[1] = 1.0 / 0.0;
+ for (i = 1; i < SIZE; i++)
+ {
+ src.a[i] = -24.43 + 0.6 * i;
+ }
+
+ res1 = INTRINSIC (_fpclass_ph_mask) (src.x, 0xFF);
+ res2 = INTRINSIC (_mask_fpclass_ph_mask) (mask, src.x, 0xFF);
+
+ res_ref = CALC (src.a, 0xFF);
+
+ if (res_ref != res1)
+ abort ();
+
+ if ((mask & res_ref) != res2)
+ abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vfpclasssh-1a.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vfpclasssh-1a.c
new file mode 100644
index 00000000000..7a31fd8b47d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vfpclasssh-1a.c
@@ -0,0 +1,16 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512fp16 -O2" } */
+/* { dg-final { scan-assembler-times "vfpclasssh\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n^k\]*%k\[0-7\](?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vfpclasssh\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n^k\]*%k\[0-7\]\{%k\[0-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m128h x128;
+volatile __mmask8 m8;
+
+void extern
+avx512dq_test (void)
+{
+ m8 = _mm_fpclass_sh_mask (x128, 13);
+ m8 = _mm_mask_fpclass_sh_mask (m8, x128, 13);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vfpclasssh-1b.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vfpclasssh-1b.c
new file mode 100644
index 00000000000..bdc6f9f059a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vfpclasssh-1b.c
@@ -0,0 +1,76 @@
+/* { dg-do run } */
+/* { dg-options "-O2 -mavx512fp16" } */
+/* { dg-require-effective-target avx512fp16 } */
+
+#define AVX512FP16
+#include "avx512f-helper.h"
+
+#include <math.h>
+#include <limits.h>
+#include <float.h>
+#include "avx512f-mask-type.h"
+#define SIZE (128 / 16)
+
+#ifndef __FPCLASSSH__
+#define __FPCLASSSH__
+int check_fp_class_hp (_Float16 src, int imm)
+{
+ int qNaN_res = isnan (src);
+ int sNaN_res = isnan (src);
+ int Pzero_res = (src == 0.0);
+ int Nzero_res = (src == -0.0);
+ int PInf_res = (isinf (src) == 1);
+ int NInf_res = (isinf (src) == -1);
+ int Denorm_res = (fpclassify (src) == FP_SUBNORMAL);
+ int FinNeg_res = __builtin_finite (src) && (src < 0);
+
+ int result = (((imm & 1) && qNaN_res)
+ || (((imm >> 1) & 1) && Pzero_res)
+ || (((imm >> 2) & 1) && Nzero_res)
+ || (((imm >> 3) & 1) && PInf_res)
+ || (((imm >> 4) & 1) && NInf_res)
+ || (((imm >> 5) & 1) && Denorm_res)
+ || (((imm >> 6) & 1) && FinNeg_res)
+ || (((imm >> 7) & 1) && sNaN_res));
+ return result;
+}
+#endif
+
+__mmask8
+CALC (_Float16 *s1, int imm)
+{
+ int i;
+ __mmask8 res = 0;
+
+ if (check_fp_class_hp(s1[0], imm))
+ res = res | 1;
+
+ return res;
+}
+
+void
+TEST (void)
+{
+ int i;
+ union128h src;
+ __mmask8 res1, res2, res_ref = 0;
+ __mmask8 mask = MASK_VALUE;
+
+ src.a[0] = 1.0 / 0.0;
+ for (i = 1; i < SIZE; i++)
+ {
+ src.a[i] = -24.43 + 0.6 * i;
+ }
+
+ res1 = _mm_fpclass_sh_mask (src.x, 0xFF);
+ res2 = _mm_mask_fpclass_sh_mask (mask, src.x, 0xFF);
+
+
+ res_ref = CALC (src.a, 0xFF);
+
+ if (res_ref != res1)
+ abort ();
+
+ if ((mask & res_ref) != res2)
+ abort ();
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vgetexpph-1a.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vgetexpph-1a.c
new file mode 100644
index 00000000000..993cbd944d1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vgetexpph-1a.c
@@ -0,0 +1,24 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512fp16 -O2" } */
+/* { dg-final { scan-assembler-times "vgetexpph\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1} } */
+/* { dg-final { scan-assembler-times "vgetexpph\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1} } */
+/* { dg-final { scan-assembler-times "vgetexpph\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1} } */
+/* { dg-final { scan-assembler-times "vgetexpph\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1} } */
+/* { dg-final { scan-assembler-times "vgetexpph\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1} } */
+/* { dg-final { scan-assembler-times "vgetexpph\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1} } */
+
+#include <immintrin.h>
+
+volatile __m512h x;
+volatile __mmask32 m;
+
+void extern
+avx512f_test (void)
+{
+ x = _mm512_getexp_ph (x);
+ x = _mm512_mask_getexp_ph (x, m, x);
+ x = _mm512_maskz_getexp_ph (m, x);
+ x = _mm512_getexp_round_ph (x, _MM_FROUND_NO_EXC);
+ x = _mm512_mask_getexp_round_ph (x, m, x, _MM_FROUND_NO_EXC);
+ x = _mm512_maskz_getexp_round_ph (m, x, _MM_FROUND_NO_EXC);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vgetexpph-1b.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vgetexpph-1b.c
new file mode 100644
index 00000000000..3483c9537dd
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vgetexpph-1b.c
@@ -0,0 +1,99 @@
+ /* { dg-do run { target avx512fp16 } } */
+/* { dg-options "-O2 -mavx512fp16 -mavx512dq" } */
+
+
+#define AVX512FP16
+#include "avx512fp16-helper.h"
+
+#define N_ELEMS (AVX512F_LEN / 16)
+
+void NOINLINE
+EMULATE(getexp_ph) (V512 * dest, V512 op1,
+ __mmask32 k, int zero_mask)
+{
+ V512 v1, v2, v3, v4, v5, v6, v7, v8;
+ int i;
+ float emu[32];
+ __mmask16 m1, m2;
+ m1 = k & 0xffff;
+ m2 = (k >> 16) & 0xffff;
+ unpack_ph_2twops(op1, &v1, &v2);
+ unpack_ph_2twops(*dest, &v7, &v8);
+ v3.zmm = _mm512_getexp_round_ps(v1.zmm, _ROUND_CUR);
+ v4.zmm = _mm512_getexp_round_ps(v2.zmm, _ROUND_CUR);
+ for (i=0; i<16; i++)
+ {
+ emu[i] = v3.f32[i];
+ emu[i+16] = v4.f32[i];
+ }
+ for (i = 0; i < 16; i++) {
+ if (((1 << i) & m1) == 0) {
+ if (zero_mask) {
+ v5.f32[i] = 0;
+ }
+ else {
+ v5.u32[i] = v7.u32[i];
+ }
+ }
+ else {
+ v5.f32[i] = emu[i];
+
+ }
+
+ if (((1 << i) & m2) == 0) {
+ if (zero_mask) {
+ v6.f32[i] = 0;
+ }
+ else {
+ v6.u32[i] = v8.u32[i];
+ }
+ }
+ else {
+ v6.f32[i] = emu[i+16];
+ }
+
+ }
+ *dest = pack_twops_2ph(v5, v6);
+}
+
+void
+TEST (void)
+{
+ V512 res;
+ V512 exp;
+
+ init_src();
+
+ EMULATE(getexp_ph) (&exp, src1, NET_MASK, 0);
+ HF(res) = INTRINSIC (_getexp_ph) (HF(src1));
+ CHECK_RESULT (&res, &exp, N_ELEMS, _getexp_ph);
+
+ init_dest(&res, &exp);
+ EMULATE(getexp_ph) (&exp, src1, MASK_VALUE, 0);
+ HF(res) = INTRINSIC (_mask_getexp_ph) (HF(res), MASK_VALUE, HF(src1));
+ CHECK_RESULT (&res, &exp, N_ELEMS, _mask_getexp_ph);
+
+ EMULATE(getexp_ph) (&exp, src1, ZMASK_VALUE, 1);
+ HF(res) = INTRINSIC (_maskz_getexp_ph) (ZMASK_VALUE, HF(src1));
+ CHECK_RESULT (&res, &exp, N_ELEMS, _maskz_getexp_ph);
+#if AVX512F_LEN == 512
+ EMULATE(getexp_ph) (&exp, src1, NET_MASK, 0);
+ HF(res) = INTRINSIC (_getexp_round_ph) (HF(src1), _ROUND_CUR);
+ CHECK_RESULT (&res, &exp, N_ELEMS, _getexp_round_ph);
+
+ init_dest(&res, &exp);
+ EMULATE(getexp_ph) (&exp, src1, MASK_VALUE, 0);
+ HF(res) = INTRINSIC (_mask_getexp_round_ph) (HF(res), MASK_VALUE, HF(src1),
+ _ROUND_CUR);
+ CHECK_RESULT (&res, &exp, N_ELEMS, _mask_getexp_round_ph);
+
+ EMULATE(getexp_ph) (&exp, src1, ZMASK_VALUE, 1);
+ HF(res) = INTRINSIC (_maskz_getexp_round_ph) (ZMASK_VALUE, HF(src1), _ROUND_CUR);
+ CHECK_RESULT (&res, &exp, N_ELEMS, _maskz_getexp_round_ph);
+#endif
+
+ if (n_errs != 0) {
+ abort ();
+ }
+}
+
diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vgetexpsh-1a.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vgetexpsh-1a.c
new file mode 100644
index 00000000000..397fd3e14a5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vgetexpsh-1a.c
@@ -0,0 +1,24 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512fp16 -O2" } */
+/* { dg-final { scan-assembler-times "vgetexpsh\[ \\t\]+\[^\{\n\]\[^\n\]*%xmm\[0-9\]+\, %xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vgetexpsh\[ \\t\]+\[^\{\n\]\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vgetexpsh\[ \\t\]+\[^\{\n\]\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vgetexpsh\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%xmm\[0-9\]+\, %xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vgetexpsh\[ \\t\]+\[^\n\]*\{sae\}\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vgetexpsh\[ \\t\]+\[^\n\]*\{sae\}\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m128h x;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+ x = _mm_getexp_sh (x, x);
+ x = _mm_mask_getexp_sh (x, m, x, x);
+ x = _mm_maskz_getexp_sh (m, x, x);
+ x = _mm_getexp_round_sh (x, x, _MM_FROUND_NO_EXC);
+ x = _mm_mask_getexp_round_sh (x, m, x, x, _MM_FROUND_NO_EXC);
+ x = _mm_maskz_getexp_round_sh (m, x, x, _MM_FROUND_NO_EXC);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vgetexpsh-1b.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vgetexpsh-1b.c
new file mode 100644
index 00000000000..ca9834df6e4
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vgetexpsh-1b.c
@@ -0,0 +1,61 @@
+/* { dg-do run { target avx512fp16 } } */
+/* { dg-options "-O2 -mavx512fp16 -mavx512dq" } */
+
+
+#define AVX512FP16
+#include "avx512fp16-helper.h"
+
+#define N_ELEMS 8
+
+void NOINLINE
+emulate_getexp_sh(V512 * dest, V512 op1,
+ __mmask32 k, int zero_mask)
+{
+ V512 v0, v1, v2, v5, v6, v7, v8;
+ int i;
+
+ unpack_ph_2twops(op1, &v1, &v2);
+ unpack_ph_2twops(*dest, &v7, &v8);
+
+ v0.xmm[0] = _mm_getexp_round_ss (v1.xmm[0], v1.xmm[0], _ROUND_CUR);
+
+ if ((k&1) || !k)
+ v5.f32[0] = v0.f32[0];
+ else if (zero_mask)
+ v5.f32[0] = 0;
+ else
+ v5.f32[0] = v7.f32[0];
+
+ for (i = 1; i < 8; i++)
+ v5.f32[i] = v1.f32[i];
+ *dest = pack_twops_2ph(v5, v6);
+}
+
+void
+test_512 (void)
+{
+ V512 res;
+ V512 exp;
+
+ init_src();
+
+ emulate_getexp_sh(&exp, src1, 0x1, 0);
+ res.xmmh[0] = _mm_getexp_round_sh(exp.xmmh[0], src1.xmmh[0], _ROUND_CUR);
+ check_results(&res, &exp, N_ELEMS, "_mm_getexp_round_sh");
+
+ init_dest(&res, &exp);
+ emulate_getexp_sh(&exp, src1, 0x1, 0);
+ res.xmmh[0] = _mm_mask_getexp_round_sh(res.xmmh[0], 0x1, exp.xmmh[0],
+ src1.xmmh[0], _ROUND_CUR);
+ check_results(&res, &exp, N_ELEMS, "_mm_mask_getexp_round_sh");
+
+ emulate_getexp_sh(&exp, src1, 0x3, 1);
+ res.xmmh[0] = _mm_maskz_getexp_round_sh(0x3, exp.xmmh[0], src1.xmmh[0],
+ _ROUND_CUR);
+ check_results(&res, &exp, N_ELEMS, "_mm_maskz_getexp_round_sh");
+
+ if (n_errs != 0) {
+ abort ();
+ }
+}
+
diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vgetmantph-1a.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vgetmantph-1a.c
new file mode 100644
index 00000000000..69e0c72721b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vgetmantph-1a.c
@@ -0,0 +1,24 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx512fp16" } */
+/* { dg-final { scan-assembler-times "vgetmantph\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vgetmantph\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vgetmantph\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vgetmantph\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vgetmantph\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vgetmantph\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m512h x, y;
+volatile __mmask32 m;
+
+void extern
+avx512f_test (void)
+{
+ x = _mm512_getmant_ph (y, _MM_MANT_NORM_p75_1p5, _MM_MANT_SIGN_src);
+ x = _mm512_mask_getmant_ph (x, m, y, _MM_MANT_NORM_p75_1p5, _MM_MANT_SIGN_src);
+ x = _mm512_maskz_getmant_ph (m, y, _MM_MANT_NORM_p75_1p5, _MM_MANT_SIGN_src);
+ x = _mm512_getmant_round_ph (y, _MM_MANT_NORM_p75_1p5, _MM_MANT_SIGN_src, _MM_FROUND_NO_EXC);
+ x = _mm512_mask_getmant_round_ph (x, m, y, _MM_MANT_NORM_p75_1p5, _MM_MANT_SIGN_src, _MM_FROUND_NO_EXC);
+ x = _mm512_maskz_getmant_round_ph (m, y, _MM_MANT_NORM_p75_1p5, _MM_MANT_SIGN_src, _MM_FROUND_NO_EXC);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vgetmantph-1b.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vgetmantph-1b.c
new file mode 100644
index 00000000000..c18d1aa5dc1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vgetmantph-1b.c
@@ -0,0 +1,102 @@
+/* { dg-do run { target avx512fp16 } } */
+/* { dg-options "-O2 -mavx512fp16 -mavx512dq" } */
+
+
+#define AVX512FP16
+#include "avx512fp16-helper.h"
+
+#define N_ELEMS (AVX512F_LEN / 16)
+
+void NOINLINE
+EMULATE(getmant_ph) (V512 * dest, V512 op1,
+ __mmask32 k, int zero_mask)
+{
+ V512 v1, v2, v3, v4, v5, v6, v7, v8;
+ int i;
+ float emu[32];
+ __mmask16 m1, m2;
+ m1 = k & 0xffff;
+ m2 = (k >> 16) & 0xffff;
+ unpack_ph_2twops(op1, &v1, &v2);
+ unpack_ph_2twops(*dest, &v7, &v8);
+ v3.zmm = _mm512_getmant_round_ps(v1.zmm, 2, 0, _ROUND_CUR);
+ v4.zmm = _mm512_getmant_round_ps(v2.zmm, 2, 0, _ROUND_CUR);
+ for (i=0; i<16; i++)
+ {
+ emu[i] = v3.f32[i];
+ emu[i+16] = v4.f32[i];
+ }
+ for (i = 0; i < 16; i++) {
+ if (((1 << i) & m1) == 0) {
+ if (zero_mask) {
+ v5.f32[i] = 0;
+ }
+ else {
+ v5.u32[i] = v7.u32[i];
+ }
+ }
+ else {
+ v5.f32[i] = emu[i];
+
+ }
+
+ if (((1 << i) & m2) == 0) {
+ if (zero_mask) {
+ v6.f32[i] = 0;
+ }
+ else {
+ v6.u32[i] = v8.u32[i];
+ }
+ }
+ else {
+ v6.f32[i] = emu[i+16];
+ }
+
+ }
+ *dest = pack_twops_2ph(v5, v6);
+}
+
+void
+TEST (void)
+{
+ V512 res;
+ V512 exp;
+
+ init_src();
+
+ EMULATE(getmant_ph) (&exp, src1, NET_MASK, 0);
+ HF(res) = INTRINSIC (_getmant_ph) (HF(src1), 2, 0);
+ CHECK_RESULT (&res, &exp, N_ELEMS, _getmant_ph);
+
+ init_dest(&res, &exp);
+ EMULATE(getmant_ph) (&exp, src1, MASK_VALUE, 0);
+ HF(res) = INTRINSIC (_mask_getmant_ph) (HF(res), MASK_VALUE,
+ HF(src1), 2, 0);
+ CHECK_RESULT (&res, &exp, N_ELEMS, _mask_getmant_ph);
+
+ EMULATE(getmant_ph) (&exp, src1, ZMASK_VALUE, 1);
+ HF(res) = INTRINSIC (_maskz_getmant_ph) (ZMASK_VALUE, HF(src1),
+ 2, 0);
+ CHECK_RESULT (&res, &exp, N_ELEMS, _maskz_getmant_ph);
+#if AVX512F_LEN == 512
+ EMULATE(getmant_ph) (&exp, src1, NET_MASK, 0);
+ HF(res) = INTRINSIC (_getmant_round_ph) (HF(src1), 2, 0, _ROUND_CUR);
+ CHECK_RESULT (&res, &exp, N_ELEMS, _getmant_round_ph);
+
+ init_dest(&res, &exp);
+ EMULATE(getmant_ph) (&exp, src1, MASK_VALUE, 0);
+ HF(res) = INTRINSIC (_mask_getmant_round_ph) (HF(res), MASK_VALUE,
+ HF(src1), 2, 0, _ROUND_CUR);
+ CHECK_RESULT (&res, &exp, N_ELEMS, _mask_getmant_round_ph);
+
+ EMULATE(getmant_ph) (&exp, src1, ZMASK_VALUE, 1);
+ HF(res) = INTRINSIC (_maskz_getmant_round_ph) (ZMASK_VALUE, HF(src1),
+ 2, 0, _ROUND_CUR);
+ CHECK_RESULT (&res, &exp, N_ELEMS, _maskz_getmant_round_ph);
+#endif
+
+ if (n_errs != 0) {
+ abort ();
+ }
+}
+
diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vgetmantsh-1a.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vgetmantsh-1a.c
new file mode 100644
index 00000000000..b533f20341b
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vgetmantsh-1a.c
@@ -0,0 +1,24 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx512fp16" } */
+/* { dg-final { scan-assembler-times "vgetmantsh\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vgetmantsh\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vgetmantsh\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vgetmantsh\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vgetmantsh\[ \\t\]+\[^\n\]*\{sae\}\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vgetmantsh\[ \\t\]+\[^\n\]*\{sae\}\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m128h x, y, z;
+volatile __mmask8 m;
+
+void extern
+avx512f_test (void)
+{
+ x = _mm_getmant_sh (y, z, _MM_MANT_NORM_p75_1p5, _MM_MANT_SIGN_src);
+ x = _mm_mask_getmant_sh (x, m, y, z, _MM_MANT_NORM_p75_1p5, _MM_MANT_SIGN_src);
+ x = _mm_maskz_getmant_sh (m, y, z, _MM_MANT_NORM_p75_1p5, _MM_MANT_SIGN_src);
+ x = _mm_getmant_round_sh (y, z, _MM_MANT_NORM_p75_1p5, _MM_MANT_SIGN_src, _MM_FROUND_NO_EXC);
+ x = _mm_mask_getmant_round_sh (x, m, y, z, _MM_MANT_NORM_p75_1p5, _MM_MANT_SIGN_src, _MM_FROUND_NO_EXC);
+ x = _mm_maskz_getmant_round_sh (m, y, z, _MM_MANT_NORM_p75_1p5, _MM_MANT_SIGN_src, _MM_FROUND_NO_EXC);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16-vgetmantsh-1b.c b/gcc/testsuite/gcc.target/i386/avx512fp16-vgetmantsh-1b.c
new file mode 100644
index 00000000000..bee8b04dfc5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16-vgetmantsh-1b.c
@@ -0,0 +1,62 @@
+/* { dg-do run { target avx512fp16 } } */
+/* { dg-options "-O2 -mavx512fp16 -mavx512dq" } */
+
+
+#define AVX512FP16
+#include "avx512fp16-helper.h"
+
+#define N_ELEMS 8
+
+void NOINLINE
+emulate_getmant_sh(V512 * dest, V512 op1,
+ __mmask32 k, int zero_mask)
+{
+ V512 v0, v1, v2, v5, v6, v7, v8;
+ int i;
+
+ unpack_ph_2twops(op1, &v1, &v2);
+ unpack_ph_2twops(*dest, &v7, &v8);
+
+ v0.xmm[0] = _mm_getmant_round_ss (v1.xmm[0], v1.xmm[0], 2, 0, _ROUND_CUR);
+
+ if ((k&1) || !k)
+ v5.f32[0] = v0.f32[0];
+ else if (zero_mask)
+ v5.f32[0] = 0;
+ else
+ v5.f32[0] = v7.f32[0];
+
+ for (i = 1; i < 8; i++)
+ v5.f32[i] = v1.f32[i];
+ *dest = pack_twops_2ph(v5, v6);
+}
+
+void
+test_512 (void)
+{
+ V512 res;
+ V512 exp;
+
+ init_src();
+
+ emulate_getmant_sh(&exp, src1, 0x1, 0);
+ res.xmmh[0] = _mm_getmant_round_sh(src1.xmmh[0], exp.xmmh[0],
+ 2, 0, _ROUND_CUR);
+ check_results(&res, &exp, 1, "_mm_getmant_round_sh");
+
+ init_dest(&res, &exp);
+ emulate_getmant_sh(&exp, src1, 0x1, 0);
+ res.xmmh[0] = _mm_mask_getmant_round_sh(res.xmmh[0], 0x1, src1.xmmh[0],
+ exp.xmmh[0], 2, 0, _ROUND_CUR);
+ check_results(&res, &exp, 1, "_mm_mask_getmant_round_sh");
+
+ emulate_getmant_sh(&exp, src1, 0x3, 1);
+ res.xmmh[0] = _mm_maskz_getmant_round_sh(0x3, src1.xmmh[0], exp.xmmh[0],
+ 2, 0, _ROUND_CUR);
+ check_results(&res, &exp, 1, "_mm_maskz_getmant_round_sh");
+
+ if (n_errs != 0) {
+ abort ();
+ }
+}
+
diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16vl-vfpclassph-1a.c b/gcc/testsuite/gcc.target/i386/avx512fp16vl-vfpclassph-1a.c
new file mode 100644
index 00000000000..897a3c83692
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16vl-vfpclassph-1a.c
@@ -0,0 +1,22 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512fp16 -mavx512vl -O2" } */
+/* { dg-final { scan-assembler-times "vfpclassphy\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n^k\]*%k\[0-7\](?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vfpclassphx\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n^k\]*%k\[0-7\](?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vfpclassphy\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n^k\]*%k\[0-7\]\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vfpclassphx\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n^k\]*%k\[0-7\]\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m256h x256;
+volatile __m128h x128;
+volatile __mmask16 m16;
+volatile __mmask8 m8;
+
+void extern
+avx512dq_test (void)
+{
+ m16 = _mm256_fpclass_ph_mask (x256, 13);
+ m8 = _mm_fpclass_ph_mask (x128, 13);
+ m16 = _mm256_mask_fpclass_ph_mask (2, x256, 13);
+ m8 = _mm_mask_fpclass_ph_mask (2, x128, 13);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16vl-vfpclassph-1b.c b/gcc/testsuite/gcc.target/i386/avx512fp16vl-vfpclassph-1b.c
new file mode 100644
index 00000000000..6745f137c27
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16vl-vfpclassph-1b.c
@@ -0,0 +1,16 @@
+/* { dg-do run { target avx512fp16 } } */
+/* { dg-options "-O2 -mavx512fp16 -mavx512vl -mavx512dq" } */
+
+#define DEBUG
+#define AVX512VL
+#define AVX512F_LEN 256
+#define AVX512F_LEN_HALF 128
+#include "avx512fp16-vfpclassph-1b.c"
+
+#undef AVX512F_LEN
+#undef AVX512F_LEN_HALF
+
+#define AVX512F_LEN 128
+#define AVX512F_LEN_HALF 128
+#include "avx512fp16-vfpclassph-1b.c"
+
diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16vl-vgetexpph-1a.c b/gcc/testsuite/gcc.target/i386/avx512fp16vl-vgetexpph-1a.c
new file mode 100644
index 00000000000..82c23b6e63d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16vl-vgetexpph-1a.c
@@ -0,0 +1,26 @@
+/* { dg-do compile } */
+/* { dg-options "-mavx512vl -mavx512fp16 -O2" } */
+/* { dg-final { scan-assembler-times "vgetexpph\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1} } */
+/* { dg-final { scan-assembler-times "vgetexpph\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1} } */
+/* { dg-final { scan-assembler-times "vgetexpph\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1} } */
+/* { dg-final { scan-assembler-times "vgetexpph\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1} } */
+/* { dg-final { scan-assembler-times "vgetexpph\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1} } */
+/* { dg-final { scan-assembler-times "vgetexpph\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1} } */
+
+#include <immintrin.h>
+
+volatile __m256h xx;
+volatile __m128h x2;
+volatile __mmask8 m8;
+volatile __mmask16 m16;
+
+void extern
+avx512vl_test (void)
+{
+ xx = _mm256_getexp_ph (xx);
+ xx = _mm256_mask_getexp_ph (xx, m16, xx);
+ xx = _mm256_maskz_getexp_ph (m16, xx);
+ x2 = _mm_getexp_ph (x2);
+ x2 = _mm_mask_getexp_ph (x2, m8, x2);
+ x2 = _mm_maskz_getexp_ph (m8, x2);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16vl-vgetexpph-1b.c b/gcc/testsuite/gcc.target/i386/avx512fp16vl-vgetexpph-1b.c
new file mode 100644
index 00000000000..7eb4fa4f537
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16vl-vgetexpph-1b.c
@@ -0,0 +1,16 @@
+/* { dg-do run { target avx512fp16 } } */
+/* { dg-options "-O2 -mavx512fp16 -mavx512vl -mavx512dq" } */
+
+#define DEBUG
+#define AVX512VL
+#define AVX512F_LEN 256
+#define AVX512F_LEN_HALF 128
+#include "avx512fp16-vgetexpph-1b.c"
+
+#undef AVX512F_LEN
+#undef AVX512F_LEN_HALF
+
+#define AVX512F_LEN 128
+#define AVX512F_LEN_HALF 128
+#include "avx512fp16-vgetexpph-1b.c"
+
diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16vl-vgetmantph-1a.c b/gcc/testsuite/gcc.target/i386/avx512fp16vl-vgetmantph-1a.c
new file mode 100644
index 00000000000..4ce6ed58cf1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16vl-vgetmantph-1a.c
@@ -0,0 +1,30 @@
+/* { dg-do compile } */
+/* { dg-options "-O2 -mavx512vl -mavx512fp16 " } */
+/* { dg-final { scan-assembler-times "vgetmantph\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vgetmantph\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vgetmantph\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vgetmantph\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vgetmantph\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
+/* { dg-final { scan-assembler-times "vgetmantph\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
+
+#include <immintrin.h>
+
+volatile __m256h x, y;
+volatile __m128h a, b;
+volatile __mmask8 m8;
+volatile __mmask16 m16;
+
+void extern
+avx512vl_test (void)
+{
+ x = _mm256_getmant_ph (y, _MM_MANT_NORM_p75_1p5, _MM_MANT_SIGN_src);
+ x = _mm256_mask_getmant_ph (x, m16, y, _MM_MANT_NORM_p75_1p5,
+ _MM_MANT_SIGN_src);
+ x = _mm256_maskz_getmant_ph (m16, y, _MM_MANT_NORM_p75_1p5,
+ _MM_MANT_SIGN_src);
+ a = _mm_getmant_ph (b, _MM_MANT_NORM_p75_1p5, _MM_MANT_SIGN_src);
+ a = _mm_mask_getmant_ph (a, m8, b, _MM_MANT_NORM_p75_1p5,
+ _MM_MANT_SIGN_src);
+ a = _mm_maskz_getmant_ph (m8, b, _MM_MANT_NORM_p75_1p5,
+ _MM_MANT_SIGN_src);
+}
diff --git a/gcc/testsuite/gcc.target/i386/avx512fp16vl-vgetmantph-1b.c b/gcc/testsuite/gcc.target/i386/avx512fp16vl-vgetmantph-1b.c
new file mode 100644
index 00000000000..e5f87401558
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/avx512fp16vl-vgetmantph-1b.c
@@ -0,0 +1,16 @@
+/* { dg-do run { target avx512fp16 } } */
+/* { dg-options "-O2 -mavx512fp16 -mavx512vl -mavx512dq" } */
+
+#define DEBUG
+#define AVX512VL
+#define AVX512F_LEN 256
+#define AVX512F_LEN_HALF 128
+#include "avx512fp16-vgetmantph-1b.c"
+
+#undef AVX512F_LEN
+#undef AVX512F_LEN_HALF
+
+#define AVX512F_LEN 128
+#define AVX512F_LEN_HALF 128
+#include "avx512fp16-vgetmantph-1b.c"
+
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2021-09-14 4:35 [gcc r12-3510] AVX512FP16: Add testcase for fpclass/getmant/getexp instructions hongtao Liu
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