[gcc(refs/vendors/ARM/heads/morello)] aarch64: Fix up casesi patterns for purecap

[gcc(refs/vendors/ARM/heads/morello)] aarch64: Fix up casesi patterns for purecap

[Matthew Malcomson]

https://gcc.gnu.org/g:372364e75abc1eb302636212297f6d58ecea08d6

commit 372364e75abc1eb302636212297f6d58ecea08d6
Author: Alex Coplan <alex.coplan@arm.com>
Date:   Mon Jul 19 13:57:53 2021 +0100

    aarch64: Fix up casesi patterns for purecap
    
    We were using DImode for these scratch registers which led to assembly
    failures for jump tables on Purecap Morello.
    
    gcc/ChangeLog:
    
            * config/aarch64/aarch64.md (@casesi_dispatch<mode>): Use ADDR
            for scratch registers used to hold pointers.
            (*casesi_dispatch): Likewise.

Diff:
---
 gcc/config/aarch64/aarch64.md | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index ac179171809..d885eb8de3e 100644
--- a/gcc/config/aarch64/aarch64.md
+++ b/gcc/config/aarch64/aarch64.md
@@ -766,8 +766,8 @@
   [(parallel
     [(set (pc) (match_operand:ADDR 0 ""))
      (clobber (reg:CC CC_REGNUM))
-     (clobber (match_scratch:DI 2))
-     (clobber (match_scratch:DI 3))
+     (clobber (match_scratch:ADDR 2))
+     (clobber (match_scratch:ADDR 3))
      (use (label_ref:ADDR (match_operand 1 "")))])]
   "")
 
@@ -778,8 +778,8 @@
 			     (match_operand:SI 1 "register_operand" "r")]
 			UNSPEC_CASESI)))
      (clobber (reg:CC CC_REGNUM))
-     (clobber (match_scratch:DI 3 "=r"))
-     (clobber (match_scratch:DI 4 "=r"))
+     (clobber (match_scratch:ADDR 3 "=r"))
+     (clobber (match_scratch:ADDR 4 "=r"))
      (use (label_ref:ADDR (match_operand 2 "" "")))])]
   ""
   "*