[gcc(refs/vendors/ARM/heads/morello)] [morello] Morello target testsuite tidy up for Purecap

[gcc(refs/vendors/ARM/heads/morello)] [morello] Morello target testsuite tidy up for Purecap

[Matthew Malcomson]

https://gcc.gnu.org/g:815b922d99764e6a6a02f0bf4c60aecc37b7720f

commit 815b922d99764e6a6a02f0bf4c60aecc37b7720f
Author: Stam Markianos-Wright <stam.markianos-wright@arm.com>
Date:   Mon Sep 20 16:39:05 2021 +0100

    [morello] Morello target testsuite tidy up for Purecap
    
    This makes some changes to the gcc.target/morello testsuite folder
    so that the testing makes more sense for PureCap.
    It also contains a minor change in aarch64.c that came up as an ICE
    when I was enabling these tests.
    
     Changes are:
     - Move capability_attribute_errors_2 up to the aarch64 folder.
     - Remove conflicts with fake-capability and other architecture versions.
     - Add purecap-aware target-supports and morello.exp handling.

Diff:
---
 gcc/config/aarch64/aarch64.c                                |  4 ++++
 ..._attribute_errors_2.c => capability_attribute_invalid.c} |  5 ++---
 gcc/testsuite/gcc.target/aarch64/morello/cast_int2ptr_1.c   |  1 -
 .../gcc.target/aarch64/morello/fake_atomics_runtest.c       |  3 ++-
 gcc/testsuite/gcc.target/aarch64/morello/morello.exp        |  7 ++++++-
 gcc/testsuite/lib/target-supports.exp                       | 13 +++++++++++++
 6 files changed, 27 insertions(+), 6 deletions(-)

diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index d68bbb1a4aa..1b2d807b1f3 100644
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -10618,6 +10618,10 @@ aarch64_print_operand (FILE *f, rtx x, int code)
 	  asm_fprintf (f, "%wd", INTVAL (x));
 	  break;
 
+	case CONST_NULL:
+	  asm_fprintf (f, "0");
+
+	  break;
 	case CONST:
 	  if (!VECTOR_MODE_P (GET_MODE (x)))
 	    {
diff --git a/gcc/testsuite/gcc.target/aarch64/morello/capability_attribute_errors_2.c b/gcc/testsuite/gcc.target/aarch64/capability_attribute_invalid.c
similarity index 79%
rename from gcc/testsuite/gcc.target/aarch64/morello/capability_attribute_errors_2.c
rename to gcc/testsuite/gcc.target/aarch64/capability_attribute_invalid.c
index 86f4d7650d7..647a7c9d6ef 100644
--- a/gcc/testsuite/gcc.target/aarch64/morello/capability_attribute_errors_2.c
+++ b/gcc/testsuite/gcc.target/aarch64/capability_attribute_invalid.c
@@ -1,9 +1,8 @@
-/* { dg-do compile { target aarch64*-*-* } } */
-/* { dg-skip-if "Test only for non-Morello configuration" { *-*-* } { "-mfake-capability" } { "" } } */
+/* { dg-do compile { target { aarch64*-*-* && { ! { aarch64_capability_any } } } } } */
 
 /* Error if Morello not enabled. Currently the macro mapping __capability to __attribute__((__cheri_capability__))
    is conditionally enabled on having a capability type enabled: targetm.capability_mode (), so in the first case
    we do ugly-error instead of gracefully-error.  */
 int * __capability var1; /* { dg-error "" } */
 int * __attribute__((__cheri_capability__)) var2; /* { dg-error "__capability attribute is not supported for this architecture" } */
-int * __attribute__((cheri_capability)) var3; /* { dg-error "__capability attribute is not supported for this architecture" } */
\ No newline at end of file
+int * __attribute__((cheri_capability)) var3; /* { dg-error "__capability attribute is not supported for this architecture" } */
diff --git a/gcc/testsuite/gcc.target/aarch64/morello/cast_int2ptr_1.c b/gcc/testsuite/gcc.target/aarch64/morello/cast_int2ptr_1.c
index d3efcce96e9..62cd04e76be 100644
--- a/gcc/testsuite/gcc.target/aarch64/morello/cast_int2ptr_1.c
+++ b/gcc/testsuite/gcc.target/aarch64/morello/cast_int2ptr_1.c
@@ -1,5 +1,4 @@
 /* { dg-do compile } */
-/* { dg-additional-options "-mfake-capability" } */
 
 /* Conditional expressions.  */
 
diff --git a/gcc/testsuite/gcc.target/aarch64/morello/fake_atomics_runtest.c b/gcc/testsuite/gcc.target/aarch64/morello/fake_atomics_runtest.c
index 106cd273dd4..cc7df2d91fa 100644
--- a/gcc/testsuite/gcc.target/aarch64/morello/fake_atomics_runtest.c
+++ b/gcc/testsuite/gcc.target/aarch64/morello/fake_atomics_runtest.c
@@ -1,7 +1,8 @@
 /* Simple runtest based on gcc.dg/atomic/c11-atomic-exec-3.c.
    Compiled with -march=armv8-a to test no-lse inline fallback routes.  */
 /* { dg-do run { target aarch64*-*-* } } */
-/* { dg-additional-options "-march=armv8-a -std=c11" } */
+/* { dg-additional-options "-march=armv8-a -std=c11" { target { ! cheri_capability_pure } } } */
+/* { dg-additional-options "-std=c11" { target { cheri_capability_pure } } } */
 
 extern void abort (void);
 extern void exit (int);
diff --git a/gcc/testsuite/gcc.target/aarch64/morello/morello.exp b/gcc/testsuite/gcc.target/aarch64/morello/morello.exp
index d81c17e9b78..e114fec30ed 100644
--- a/gcc/testsuite/gcc.target/aarch64/morello/morello.exp
+++ b/gcc/testsuite/gcc.target/aarch64/morello/morello.exp
@@ -36,7 +36,12 @@ if { [check_effective_target_aarch64_capability_any] } {
 }
 
 torture-init
-set-torture-options "$C_TORTURE_OPTIONS" [list -mno-outline-atomics -moutline-atomics]
+
+if { [check_effective_target_cheri_capability_pure] } {
+  set-torture-options "$C_TORTURE_OPTIONS" [list { } { -mno-outline-atomics } ]
+} else {
+  set-torture-options "$C_TORTURE_OPTIONS" [list { } { -mno-outline-atomics } { -moutline-atomics } ]
+}
 
 # Main loop.
 gcc-dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/*.\[cCS\]]] \
diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index 4ade4b3cc59..f438de2e323 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -3565,6 +3565,19 @@ proc check_effective_target_aarch64_capability_any { } {
   }]
 }
 
+proc check_effective_target_cheri_capability_pure { } {
+  # For now this is allowed only for AArch64. The definition of this may need
+  # to be expanded if other targets add support for CHERI capabilities.
+  if { ![istarget aarch64*-*-*] } {
+      return 0
+  }
+  return [check_no_compiler_messages aarch64_capability_any assembly {
+  #if !defined (__CHERI_PURE_CAPABILITY__)
+  #error foo
+  #endif
+  }]
+}
+
 # Return the size in bits of an SVE vector, or 0 if the size is variable.
 proc aarch64_sve_bits { } {
     return [check_cached_effective_target aarch64_sve_bits {