[gcc(refs/vendors/ARM/heads/morello)] Avoid some invalid assembly

[gcc(refs/vendors/ARM/heads/morello)] Avoid some invalid assembly

[Matthew Malcomson]

https://gcc.gnu.org/g:79b82feb41e4e10c6d00dfb4a2bd74e72b937e17

commit 79b82feb41e4e10c6d00dfb4a2bd74e72b937e17
Author: Matthew Malcomson <matthew.malcomson@arm.com>
Date:   Thu Sep 16 11:34:12 2021 +0100

    Avoid some invalid assembly
    
    aarch64_output_probe_stack_range, @stack_protect_set_<mode>, and
    @stack_protect_test_<mode> all had hard-coded emission of assembly that
    is invalid for PureCap instructions.
    
    This patch adjusts the above for PureCap.  probe_stack_range now emits a
    comparison between the address value of capabilities rather than a `cmp`
    directly on capabilities.  The stack protect and set/test patterns now
    emit a `subs` comparison on their relevant address values too (rather
    than trying to emit a `subs` on the capability registers).

Diff:
---
 gcc/config/aarch64/aarch64.c  |  3 ++-
 gcc/config/aarch64/aarch64.md | 25 +++++++++++++++++++++++--
 2 files changed, 25 insertions(+), 3 deletions(-)

diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index 58ca8ec2fce..7551dddba07 100644
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -6830,7 +6830,8 @@ aarch64_output_probe_stack_range (rtx reg1, rtx reg2)
   output_asm_insn ("str\txzr, [%0, %1]", xops);
 
   /* Test if TEST_ADDR == LAST_ADDR.  */
-  xops[1] = reg2;
+  xops[0] = drop_capability (xops[0]);
+  xops[1] = drop_capability (reg2);
   output_asm_insn ("cmp\t%0, %1", xops);
 
   /* Branch.  */
diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index 936079b1fb6..922f956991e 100644
--- a/gcc/config/aarch64/aarch64.md
+++ b/gcc/config/aarch64/aarch64.md
@@ -7241,7 +7241,14 @@
 	 UNSPEC_SP_SET))
    (set (match_scratch:PTR 2 "=&r") (const_int 0))]
   ""
-  "ldr\\t%<w>2, %1\;str\\t%<w>2, %0\;mov\t%<w>2, 0"
+  {
+    output_asm_insn ("ldr\\t%<w>2, %1", operands);
+    output_asm_insn ("str\\t%<w>2, %0", operands);
+    if (TARGET_CAPABILITY_PURE)
+      return "mov\t%x2, 0";
+    else
+      return "mov\t%<w>2, 0";
+  }
   [(set_attr "length" "12")
    (set_attr "type" "multiple")])
 
@@ -7285,7 +7292,21 @@
    (clobber (match_scratch:PTR 2 "=&r"))
    (clobber (match_scratch:PTR 3 "=&r"))]
   ""
-  "ldr\t%<w>2, %0\;ldr\t%<w>3, %1\;subs\t%<w>2, %<w>2, %<w>3\;mov\t%3, 0"
+  {
+    output_asm_insn ("ldr\t%<w>2, %0", operands);
+    output_asm_insn ("ldr\t%<w>3, %1", operands);
+    if (TARGET_CAPABILITY_PURE)
+      {
+	output_asm_insn ("subs\t%x2, %x2, %x3", operands);
+	output_asm_insn ("mov\t%x3, 0", operands);
+      }
+    else
+      {
+	output_asm_insn ("subs\t%<w>2, %<w>2, %<w>3", operands);
+	output_asm_insn ("mov\t%<w>3, 0", operands);
+      }
+    return "";
+  }
   [(set_attr "length" "16")
    (set_attr "type" "multiple")])