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From: Christophe Lyon <clyon@gcc.gnu.org> To: gcc-cvs@gcc.gnu.org Subject: [gcc(refs/users/clyon/heads/mve-autovec)] arm: Add support for VPR_REG in arm_class_likely_spilled_p Date: Wed, 29 Sep 2021 07:30:07 +0000 (GMT) [thread overview] Message-ID: <20210929073007.3E163385800F@sourceware.org> (raw) https://gcc.gnu.org/g:cfc54488a90a0c9485419af0ddfe09d9b07e765a commit cfc54488a90a0c9485419af0ddfe09d9b07e765a Author: Christophe Lyon <christophe.lyon@foss.st.com> Date: Wed Sep 1 09:59:56 2021 +0000 arm: Add support for VPR_REG in arm_class_likely_spilled_p VPR_REG is the only register in its class, so it should be handled by TARGET_CLASS_LIKELY_SPILLED_P. No test fails without this patch, but it seems it should be implemented. 2021-09-01 Christophe Lyon <christophe.lyon@foss.st.com> gcc/ * config/arm/arm.c (arm_class_likely_spilled_p): Handle VPR_REG. Diff: --- gcc/config/arm/arm.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index 11dafc70067..1222cb0d0fe 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -29307,6 +29307,9 @@ arm_class_likely_spilled_p (reg_class_t rclass) || rclass == CC_REG) return true; + if (TARGET_HAVE_MVE && (rclass == VPR_REG)) + return true; + return false; }
next reply other threads:[~2021-09-29 7:30 UTC|newest] Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-09-29 7:30 Christophe Lyon [this message] 2021-10-01 14:37 Christophe Lyon 2021-11-16 14:06 Christophe Lyon 2022-01-12 8:27 Christophe Lyon 2022-02-22 9:07 Christophe Lyon
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