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From: Christophe Lyon <clyon@gcc.gnu.org> To: gcc-cvs@gcc.gnu.org Subject: [gcc(refs/users/clyon/heads/mve-autovec)] arm: Add support for VPR_REG in arm_class_likely_spilled_p Date: Tue, 22 Feb 2022 09:07:51 +0000 (GMT) [thread overview] Message-ID: <20220222090751.59FB9386482C@sourceware.org> (raw) https://gcc.gnu.org/g:4dac0db14034f334e586c401ddf5af49166dbade commit 4dac0db14034f334e586c401ddf5af49166dbade Author: Christophe Lyon <christophe.lyon@foss.st.com> Date: Wed Oct 13 09:16:14 2021 +0000 arm: Add support for VPR_REG in arm_class_likely_spilled_p VPR_REG is the only register in its class, so it should be handled by TARGET_CLASS_LIKELY_SPILLED_P, which is achieved by calling default_class_likely_spilled_p. No test fails without this patch, but it seems it should be implemented. 2022-01-13 Christophe Lyon <christophe.lyon@foss.st.com> gcc/ * config/arm/arm.c (arm_class_likely_spilled_p): Handle VPR_REG. Diff: --- gcc/config/arm/arm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index c3559ca8703..64a8f2dc7de 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -29317,7 +29317,7 @@ arm_class_likely_spilled_p (reg_class_t rclass) || rclass == CC_REG) return true; - return false; + return default_class_likely_spilled_p (rclass); } /* Implements target hook small_register_classes_for_mode_p. */
next reply other threads:[~2022-02-22 9:07 UTC|newest] Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-02-22 9:07 Christophe Lyon [this message] -- strict thread matches above, loose matches on Subject: below -- 2022-01-12 8:27 Christophe Lyon 2021-11-16 14:06 Christophe Lyon 2021-10-01 14:37 Christophe Lyon 2021-09-29 7:30 Christophe Lyon
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