[gcc(refs/users/meissner/heads/work070)] Add missing XXSPLTI32DX test.

[gcc(refs/users/meissner/heads/work070)] Add missing XXSPLTI32DX test.

[Michael Meissner]

https://gcc.gnu.org/g:8f0453b240fadeff4216acd54985c003ce7911a1

commit 8f0453b240fadeff4216acd54985c003ce7911a1
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Tue Oct 5 13:59:53 2021 -0400

    Add missing XXSPLTI32DX test.
    
    2021-10-05  Michael Meissner  <meissner@linux.ibm.com>
    
    gcc/testsuite/
    
            * gcc.target/powerpc/vec-splat-constant-v2di-2.c: New test.

Diff:
---
 .../gcc.target/powerpc/vec-splat-constant-v2di-2.c | 29 ++++++++++++++++++++++
 1 file changed, 29 insertions(+)

diff --git a/gcc/testsuite/gcc.target/powerpc/vec-splat-constant-v2di-2.c b/gcc/testsuite/gcc.target/powerpc/vec-splat-constant-v2di-2.c
new file mode 100644
index 00000000000..2730742752a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vec-splat-constant-v2di-2.c
@@ -0,0 +1,29 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target power10_ok } */
+/* { dg-options "-mdejagnu-cpu=power10 -O2 -mxxsplti32dx -mxxspltiw" } */
+
+/* Test generation of integer constants loaded into the vector registers with
+   the ISA 3.1 (power10) instruction XXSPLTI32DX.  */
+
+#define LARGE_BITS	0x12345678ABCDEF01LL
+#define SUBNORMAL	0x8000000000000001LL
+
+/* 0x8000000000000001LL is the bit pattern for a negative subnormal value can
+   be generated with XXSPLTI32DX but not XXSLTIDP.  */
+vector long long
+vector_float_subnormal (void)
+{
+  /* 2x XXSPLTI32DX.  */
+  return (vector long long) { SUBNORMAL, SUBNORMAL };
+}
+
+/* 0x12345678ABCDEF01LL is a large constant that can be loaded with 2x
+   XXSPLTI32DX instructions.  */
+vector long long
+vector_large_constant (void)
+{
+  /* 2x XXSPLTI32DX.  */
+  return (vector long long) { LARGE_BITS, LARGE_BITS };
+}
+
+/* { dg-final { scan-assembler-times {\mxxsplti32dx\M} 4 } } */