[gcc(refs/users/meissner/heads/work071)] Rework code to make future patches look better.

[gcc(refs/users/meissner/heads/work071)] Rework code to make future patches look better.

[Michael Meissner]

https://gcc.gnu.org/g:005deaef00ea5999cc42f462a337436ec28ae7f7

commit 005deaef00ea5999cc42f462a337436ec28ae7f7
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Wed Oct 13 21:17:28 2021 -0400

    Rework code to make future patches look better.
    
    2021-10-13  Michael Meissner  <meissner@the-meissners.org>
    
    gcc/
    
            * config/rs6000/predicates.md (easy_fp_constant): Move to using
            vec_const instead of calling easy_vector_constant_64bit_element.
            (easy_vector_constant): Likewise.
            * config/rs6000/rs6000.c (output_vec_const_move): Rework code
            slightly to improve future patches.
            (prefixed_xxsplti_p): Likewise.
            (vec_const_to_bytes): SFmode as a scalar in registers uses the
            DFmode format.

Diff:
---
 gcc/config/rs6000/predicates.md | 23 ++++++++++++++++++-----
 gcc/config/rs6000/rs6000.c      | 27 +++++++++++++++++++--------
 2 files changed, 37 insertions(+), 13 deletions(-)

diff --git a/gcc/config/rs6000/predicates.md b/gcc/config/rs6000/predicates.md
index f2ee2bed230..ddad7ca3ae9 100644
--- a/gcc/config/rs6000/predicates.md
+++ b/gcc/config/rs6000/predicates.md
@@ -601,9 +601,15 @@
   if (TARGET_VSX && op == CONST0_RTX (mode))
     return 1;
 
-  /* See if the constant can be generated with the XXSPLTIDP instruction.  */
-  if (easy_vector_constant_64bit_element (op, mode))
-    return 1;
+  /* See if the constant can be generated with the ISA 3.1
+     instructions.  */
+  rs6000_vec_const vec_const;
+
+  if (vec_const_to_bytes (op, mode, &vec_const))
+    {
+      if (vec_const_use_xxspltidp (&vec_const))
+	return true;
+    }
 
   /* Otherwise consider floating point constants hard, so that the
      constant gets pushed to memory during the early RTL phases.  This
@@ -681,8 +687,15 @@
           && xxspltib_constant_p (op, mode, &num_insns, &value))
 	return true;
 
-      if (easy_vector_constant_64bit_element (op, mode))
-	return true;
+      /* See if the constant can be generated with the ISA 3.1
+         instructions.  */
+      rs6000_vec_const vec_const;
+
+      if (vec_const_to_bytes (op, mode, &vec_const))
+	{
+	  if (vec_const_use_xxspltidp (&vec_const))
+	    return true;
+	}
 
       return easy_altivec_constant (op, mode);
     }
diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index 8031c9a803b..05b2691d38a 100644
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -6991,11 +6991,13 @@ output_vec_const_move (rtx *operands)
 	}
 
       rs6000_vec_const vec_const;
-      if (vec_const_to_bytes (vec, mode, &vec_const)
-	  && vec_const_use_xxspltidp (&vec_const))
+      if (vec_const_to_bytes (vec, mode, &vec_const))
 	{
-	  operands[2] = GEN_INT (vec_const.xxspltidp_immediate);
-	  return "xxspltidp %x0,%2";
+	  if (vec_const_use_xxspltidp (&vec_const))
+	    {
+	      operands[2] = GEN_INT (vec_const.xxspltidp_immediate);
+	      return "xxspltidp %x0,%2";
+	    }
 	}
 
       if (TARGET_P9_VECTOR
@@ -26758,11 +26760,16 @@ prefixed_xxsplti_p (rtx_insn *insn)
     }
 
   rs6000_vec_const vec_const;
-  if (!vec_const_to_bytes (src, mode, &vec_const))
-    return false;
+  if (vec_const_to_bytes (src, mode, &vec_const))
+    {
+      if (vec_const.is_prefixed)
+	return true;
 
-  return (vec_const.is_prefixed
-	  || vec_const_use_xxspltidp (&vec_const));
+      if (vec_const_use_xxspltidp (&vec_const))
+	return true;
+    }
+
+  return false;
 }
 
 /* Whether the next instruction needs a 'p' prefix issued before the
@@ -28820,6 +28827,10 @@ vec_const_to_bytes (rtx op,
       /* Floating point constants.  */
     case CONST_DOUBLE:
       {
+	/* SFmode stored as scalars is stored in DFmode format.  */
+	if (mode == SFmode)
+	  mode = DFmode;
+
 	vec_const_floating_point (op, mode, 0, vec_const);
 
 	/* Splat the constant to the rest of the vector constant structure.  */