[gcc r11-9206] x86: Check leal/addl gcc.target/i386/amxtile-3.c for x32

[gcc r11-9206] x86: Check leal/addl gcc.target/i386/amxtile-3.c for x32

[H.J. Lu]

https://gcc.gnu.org/g:3bfc70ca114536e28864a3515eb5a7173baf3850

commit r11-9206-g3bfc70ca114536e28864a3515eb5a7173baf3850
Author: H.J. Lu <hjl.tools@gmail.com>
Date:   Thu Nov 4 07:37:18 2021 -0700

    x86: Check leal/addl gcc.target/i386/amxtile-3.c for x32
    
    Check leal and addl for x32 to fix:
    
    FAIL: gcc.target/i386/amxtile-3.c scan-assembler addq[ \\t]+\\$12
    FAIL: gcc.target/i386/amxtile-3.c scan-assembler leaq[ \\t]+4
    FAIL: gcc.target/i386/amxtile-3.c scan-assembler leaq[ \\t]+8
    
            * gcc.target/i386/amxtile-3.c: Check leal/addl for x32.
    
    (cherry picked from commit fbe58ba97aff3270877d7fd5600c17687b85964c)

Diff:
---
 gcc/testsuite/gcc.target/i386/amxtile-3.c | 18 ++++++++++++------
 1 file changed, 12 insertions(+), 6 deletions(-)

diff --git a/gcc/testsuite/gcc.target/i386/amxtile-3.c b/gcc/testsuite/gcc.target/i386/amxtile-3.c
index 31b34d0ed15..26204e385c6 100644
--- a/gcc/testsuite/gcc.target/i386/amxtile-3.c
+++ b/gcc/testsuite/gcc.target/i386/amxtile-3.c
@@ -3,12 +3,18 @@
 /* { dg-final { scan-assembler "tileloadd\[ \\t]+\[^\n\]*\\(%\[a-z0-9]*\,%\[a-z0-9\]*\,\[124\]\\)+\[^\n\]*%tmm\[0-9\]"  } } */
 /* { dg-final { scan-assembler "tileloaddt1\[ \\t]+\[^\n\]*\\(%\[a-z0-9]*\,%\[a-z0-9\]*\,\[124\]\\)+\[^\n\]*%tmm\[0-9\]"  } } */
 /* { dg-final { scan-assembler "tilestored\[ \\t]+\[^\n\]*%tmm\[0-9\]+\[^\n\]*\\(%\[a-z0-9]*\,%\[a-z0-9\]*\,\[124\]\\)"  } } */
-/* { dg-final { scan-assembler "leaq\[ \\t]+4" } } */
-/* { dg-final { scan-assembler "leaq\[ \\t]+8" } } */
-/* { dg-final { scan-assembler "addq\[ \\t]+\\\$12" } } */
-/* { dg-final { scan-assembler-not "leaq\[ \\t]+1" } } */
-/* { dg-final { scan-assembler-not "leaq\[ \\t]+2" } } */
-/* { dg-final { scan-assembler-not "addq\[ \\t]+\\\$3" } } */
+/* { dg-final { scan-assembler "leaq\[ \\t]+4" { target lp64 } } } */
+/* { dg-final { scan-assembler "leaq\[ \\t]+8" { target lp64 } } } */
+/* { dg-final { scan-assembler "addq\[ \\t]+\\\$12" { target lp64 } } } */
+/* { dg-final { scan-assembler "leal\[ \\t]+4" { target x32 } } } */
+/* { dg-final { scan-assembler "leal\[ \\t]+8" { target x32 } } } */
+/* { dg-final { scan-assembler "addl\[ \\t]+\\\$12" { target x32 } } } */
+/* { dg-final { scan-assembler-not "leaq\[ \\t]+1" { target lp64 } } } */
+/* { dg-final { scan-assembler-not "leaq\[ \\t]+2" { target lp64 } } } */
+/* { dg-final { scan-assembler-not "addq\[ \\t]+\\\$3" { target lp64 } } } */
+/* { dg-final { scan-assembler-not "leal\[ \\t]+1" { target x32 } } } */
+/* { dg-final { scan-assembler-not "leal\[ \\t]+2" { target x32 } } } */
+/* { dg-final { scan-assembler-not "addl\[ \\t]+\\\$3" { target x32 } } } */
 #include <immintrin.h>
 
 extern int a[];