[gcc(refs/vendors/ARM/heads/morello)] morello: Fix eh_return handler in the AArch64 backend

[gcc(refs/vendors/ARM/heads/morello)] morello: Fix eh_return handler in the AArch64 backend

[Matthew Malcomson]

https://gcc.gnu.org/g:d90ad4654b5270598a9e483cd47a739eacde8eeb

commit d90ad4654b5270598a9e483cd47a739eacde8eeb
Author: Stam Markianos-Wright <stam.markianos-wright@arm.com>
Date:   Tue Nov 2 10:33:26 2021 +0000

    morello: Fix eh_return handler in the AArch64 backend
    
    A small patch to fix a piece of incorrect codegen that was
    assuming 64-bit sized values.
    
    The MEM generated here with `gen_frame_mem` should have an
    address of "hard_frame_pointer_rtx + 1 pointer-sized value",
    which for capabilities now is 128 bits.

Diff:
---
 gcc/config/aarch64/aarch64.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index 273b6de882f..b77d05db2da 100644
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -8927,7 +8927,7 @@ aarch64_expand_epilogue (bool for_sibcall)
       emit_insn (gen_add2_insn (stack_pointer_rtx, EH_RETURN_STACKADJ_RTX));
     }
 
-  emit_use (gen_rtx_REG (DImode, LR_REGNUM));
+  emit_use (gen_rtx_REG (Pmode, LR_REGNUM));
   if (!for_sibcall)
     emit_jump_insn (ret_rtx);
 }
@@ -8961,7 +8961,7 @@ rtx
 aarch64_eh_return_handler_rtx (void)
 {
   rtx tmp = gen_frame_mem (Pmode,
-    plus_constant (Pmode, hard_frame_pointer_rtx, UNITS_PER_WORD));
+    plus_constant (Pmode, hard_frame_pointer_rtx, GET_MODE_SIZE (Pmode)));
 
   /* Mark the store volatile, so no optimization is permitted to remove it.  */
   MEM_VOLATILE_P (tmp) = true;