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* [gcc r12-6021] i386: Enable VxHF vector modes lower ABI levels [PR103571]
@ 2021-12-16 18:35 Uros Bizjak
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From: Uros Bizjak @ 2021-12-16 18:35 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:271e36d9d5b3a75e7f1a927e594477e6a5dd6fc0
commit r12-6021-g271e36d9d5b3a75e7f1a927e594477e6a5dd6fc0
Author: Uros Bizjak <ubizjak@gmail.com>
Date: Thu Dec 16 19:34:50 2021 +0100
i386: Enable VxHF vector modes lower ABI levels [PR103571]
Enable VxHF vector modes for SSE2, AVX and AVX512F ABIs.
2021-12-16 Uroš Bizjak <ubizjak@gmail.com>
gcc/ChangeLog:
PR target/103571
* config/i386/i386.h (VALID_AVX256_REG_MODE): Add V16HFmode.
(VALID_AVX256_REG_OR_OI_VHF_MODE): Replace with ...
(VALID_AVX256_REG_OR_OI_MODE): ... this. Remove V16HFmode.
(VALID_AVX512F_SCALAR_MODE): Remove HImode and HFmode.
(VALID_AVX512FP16_SCALAR_MODE): New.
(VALID_AVX512F_REG_MODE): Add V32HFmode.
(VALID_SSE2_REG_MODE): Add V8HFmode, V4HFmode and V2HFmode.
(VALID_SSE2_REG_VHF_MODE): Remove.
(VALID_INT_MODE_P): Add V2HFmode.
* config/i386/i386.c (function_arg_advance_64):
Remove explicit mention of V16HFmode and V32HFmode.
(ix86_hard_regno_mode_ok): Remove explicit mention of XImode
and V32HFmode, use VALID_AVX512F_REG_OR_XI_MODE instead.
Use VALID_AVX512FP_SCALAR_MODE for TARGET_aVX512FP16.
Use VALID_AVX256_REG_OR_OI_MODE instead of
VALID_AVX256_REG_OR_OI_VHF_MODE and VALID_SSE2_REG_MODE instead
of VALID_SSE2_REG_VHF_MODE.
(ix86_set_reg_reg_cost): Remove usge of VALID_AVX512FP16_REG_MODE.
(ix86_vector_mode_supported): Ditto.
gcc/testsuite/ChangeLog:
PR target/103571
* gcc.target/i386/pr102812.c (dg-final): Do not scan for movdqa.
Diff:
---
gcc/config/i386/i386.c | 27 ++++++++++++---------------
gcc/config/i386/i386.h | 22 +++++++++++-----------
gcc/testsuite/gcc.target/i386/pr102812.c | 1 -
3 files changed, 23 insertions(+), 27 deletions(-)
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 9f4ed34ffd5..ec155826310 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -2942,9 +2942,7 @@ function_arg_advance_64 (CUMULATIVE_ARGS *cum, machine_mode mode,
/* Unnamed 512 and 256bit vector mode parameters are passed on stack. */
if (!named && (VALID_AVX512F_REG_MODE (mode)
- || VALID_AVX256_REG_MODE (mode)
- || mode == V16HFmode
- || mode == V32HFmode))
+ || VALID_AVX256_REG_MODE (mode)))
return 0;
if (!examine_argument (mode, type, 0, &int_nregs, &sse_nregs)
@@ -19915,15 +19913,17 @@ ix86_hard_regno_mode_ok (unsigned int regno, machine_mode mode)
- XI mode
- any of 512-bit wide vector mode
- any scalar mode. */
- /* For AVX512FP16, vmovw supports movement of HImode
- between gpr and sse registser. */
if (TARGET_AVX512F
- && (mode == XImode
- || mode == V32HFmode
- || VALID_AVX512F_REG_MODE (mode)
+ && (VALID_AVX512F_REG_OR_XI_MODE (mode)
|| VALID_AVX512F_SCALAR_MODE (mode)))
return true;
+ /* For AVX512FP16, vmovw supports movement of HImode
+ and HFmode between GPR and SSE registers. */
+ if (TARGET_AVX512FP16
+ && VALID_AVX512FP16_SCALAR_MODE (mode))
+ return true;
+
/* For AVX-5124FMAPS or AVX-5124VNNIW
allow V64SF and V64SI modes for special regnos. */
if ((TARGET_AVX5124FMAPS || TARGET_AVX5124VNNIW)
@@ -19934,7 +19934,7 @@ ix86_hard_regno_mode_ok (unsigned int regno, machine_mode mode)
/* TODO check for QI/HI scalars. */
/* AVX512VL allows sse regs16+ for 128/256 bit modes. */
if (TARGET_AVX512VL
- && (VALID_AVX256_REG_OR_OI_VHF_MODE (mode)
+ && (VALID_AVX256_REG_OR_OI_MODE (mode)
|| VALID_AVX512VL_128_REG_MODE (mode)))
return true;
@@ -19944,9 +19944,9 @@ ix86_hard_regno_mode_ok (unsigned int regno, machine_mode mode)
/* OImode and AVX modes are available only when AVX is enabled. */
return ((TARGET_AVX
- && VALID_AVX256_REG_OR_OI_VHF_MODE (mode))
+ && VALID_AVX256_REG_OR_OI_MODE (mode))
|| VALID_SSE_REG_MODE (mode)
- || VALID_SSE2_REG_VHF_MODE (mode)
+ || VALID_SSE2_REG_MODE (mode)
|| VALID_MMX_REG_MODE (mode)
|| VALID_MMX_REG_MODE_3DNOW (mode));
}
@@ -20156,8 +20156,7 @@ ix86_set_reg_reg_cost (machine_mode mode)
case MODE_VECTOR_INT:
case MODE_VECTOR_FLOAT:
- if ((TARGET_AVX512FP16 && VALID_AVX512FP16_REG_MODE (mode))
- || (TARGET_AVX512F && VALID_AVX512F_REG_MODE (mode))
+ if ((TARGET_AVX512F && VALID_AVX512F_REG_MODE (mode))
|| (TARGET_AVX && VALID_AVX256_REG_MODE (mode))
|| (TARGET_SSE2 && VALID_SSE2_REG_MODE (mode))
|| (TARGET_SSE && VALID_SSE_REG_MODE (mode))
@@ -22080,8 +22079,6 @@ ix86_vector_mode_supported_p (machine_mode mode)
if ((TARGET_MMX || TARGET_MMX_WITH_SSE)
&& VALID_MMX_REG_MODE (mode))
return true;
- if (TARGET_AVX512FP16 && VALID_AVX512FP16_REG_MODE (mode))
- return true;
if ((TARGET_3DNOW || TARGET_MMX_WITH_SSE)
&& VALID_MMX_REG_MODE_3DNOW (mode))
return true;
diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h
index 46fdd6e1088..398f7513752 100644
--- a/gcc/config/i386/i386.h
+++ b/gcc/config/i386/i386.h
@@ -1005,20 +1005,22 @@ extern const char *host_detect_local_cpu (int argc, const char **argv);
#define VALID_AVX256_REG_MODE(MODE) \
((MODE) == V32QImode || (MODE) == V16HImode || (MODE) == V8SImode \
|| (MODE) == V4DImode || (MODE) == V2TImode || (MODE) == V8SFmode \
- || (MODE) == V4DFmode)
+ || (MODE) == V4DFmode || (MODE) == V16HFmode)
-#define VALID_AVX256_REG_OR_OI_VHF_MODE(MODE) \
- (VALID_AVX256_REG_MODE (MODE) || (MODE) == OImode || (MODE) == V16HFmode)
+#define VALID_AVX256_REG_OR_OI_MODE(MODE) \
+ (VALID_AVX256_REG_MODE (MODE) || (MODE) == OImode)
#define VALID_AVX512F_SCALAR_MODE(MODE) \
((MODE) == DImode || (MODE) == DFmode || (MODE) == SImode \
- || (MODE) == SFmode \
- || (TARGET_AVX512FP16 && ((MODE) == HImode || (MODE) == HFmode)))
+ || (MODE) == SFmode)
+
+#define VALID_AVX512FP16_SCALAR_MODE(MODE) \
+ ((MODE) == HImode || (MODE) == HFmode)
#define VALID_AVX512F_REG_MODE(MODE) \
((MODE) == V8DImode || (MODE) == V8DFmode || (MODE) == V64QImode \
|| (MODE) == V16SImode || (MODE) == V16SFmode || (MODE) == V32HImode \
- || (MODE) == V4TImode)
+ || (MODE) == V4TImode || (MODE) == V32HFmode)
#define VALID_AVX512F_REG_OR_XI_MODE(MODE) \
(VALID_AVX512F_REG_MODE (MODE) || (MODE) == XImode)
@@ -1035,13 +1037,10 @@ extern const char *host_detect_local_cpu (int argc, const char **argv);
#define VALID_SSE2_REG_MODE(MODE) \
((MODE) == V16QImode || (MODE) == V8HImode || (MODE) == V2DFmode \
+ || (MODE) == V8HFmode || (MODE) == V4HFmode || (MODE) == V2HFmode \
|| (MODE) == V4QImode || (MODE) == V2HImode || (MODE) == V1SImode \
|| (MODE) == V2DImode || (MODE) == DFmode || (MODE) == HFmode)
-#define VALID_SSE2_REG_VHF_MODE(MODE) \
- (VALID_SSE2_REG_MODE (MODE) || (MODE) == V8HFmode \
- || (MODE) == V4HFmode || (MODE) == V2HFmode)
-
#define VALID_SSE_REG_MODE(MODE) \
((MODE) == V1TImode || (MODE) == TImode \
|| (MODE) == V4SFmode || (MODE) == V4SImode \
@@ -1072,7 +1071,8 @@ extern const char *host_detect_local_cpu (int argc, const char **argv);
|| (MODE) == CSImode || (MODE) == CDImode \
|| (MODE) == SDmode || (MODE) == DDmode \
|| (MODE) == HFmode || (MODE) == HCmode \
- || (MODE) == V4QImode || (MODE) == V2HImode || (MODE) == V1SImode \
+ || (MODE) == V2HImode || (MODE) == V2HFmode \
+ || (MODE) == V1SImode || (MODE) == V4QImode \
|| (TARGET_64BIT \
&& ((MODE) == TImode || (MODE) == CTImode \
|| (MODE) == TFmode || (MODE) == TCmode \
diff --git a/gcc/testsuite/gcc.target/i386/pr102812.c b/gcc/testsuite/gcc.target/i386/pr102812.c
index bad4fa9394e..51c89a636fb 100644
--- a/gcc/testsuite/gcc.target/i386/pr102812.c
+++ b/gcc/testsuite/gcc.target/i386/pr102812.c
@@ -2,7 +2,6 @@
/* { dg-do compile } */
/* { dg-options "-O2 -msse4 -mno-avx" } */
/* { dg-final { scan-assembler-not "vmovdqa64\t" } } */
-/* { dg-final { scan-assembler "movdqa\t" } } */
typedef _Float16 v8hf __attribute__((__vector_size__ (16)));
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