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* [gcc r12-6108] Daily bump.
@ 2021-12-24 0:17 GCC Administrator
0 siblings, 0 replies; only message in thread
From: GCC Administrator @ 2021-12-24 0:17 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:7d01da81b804375522f5da0ce881ba17438149cc
commit r12-6108-g7d01da81b804375522f5da0ce881ba17438149cc
Author: GCC Administrator <gccadmin@gcc.gnu.org>
Date: Fri Dec 24 00:16:27 2021 +0000
Daily bump.
Diff:
---
gcc/ChangeLog | 55 +++++++++++++++++++++++++++++++++++++++++++++++++
gcc/DATESTAMP | 2 +-
gcc/testsuite/ChangeLog | 27 ++++++++++++++++++++++++
3 files changed, 83 insertions(+), 1 deletion(-)
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index f34411e3fef..4f31d50514b 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,58 @@
+2021-12-23 Roger Sayle <roger@nextmovesoftware.com>
+ Uroš Bizjak <ubizjak@gmail.com>
+
+ PR target/103773
+ * config/i386/i386.md (*mov<mode>_and): New define_insn for
+ writing a zero to memory using AND.
+ (*mov<mode>_or): Extend to allow memory destination and HImode.
+ (*movdi_internal): Remove -Oz push/pop optimization from here.
+ (*movsi_internal): Likewise.
+ (peephole2): Perform -Oz push/pop optimization here, only for
+ register destinations, values other than zero, and in functions
+ that don't used the red zone.
+ (peephole2): With -Oz, convert writes of 0 or -1 to memory into
+ their clobber forms, i.e. *mov<mode>_and and *mov<mode>_or resp.
+
+2021-12-23 konglin1 <lingling.kong@intel.com>
+
+ * config/i386/avx512bf16intrin.h (_mm_cvtsbh_ss): Add new intrinsic.
+ (_mm512_cvtpbh_ps): Likewise.
+ (_mm512_maskz_cvtpbh_ps): Likewise.
+ (_mm512_mask_cvtpbh_ps): Likewise.
+ * config/i386/avx512bf16vlintrin.h (_mm_cvtness_sbh): Likewise.
+ (_mm_cvtpbh_ps): Likewise.
+ (_mm256_cvtpbh_ps): Likewise.
+ (_mm_maskz_cvtpbh_ps): Likewise.
+ (_mm256_maskz_cvtpbh_ps): Likewise.
+ (_mm_mask_cvtpbh_ps): Likewise.
+ (_mm256_mask_cvtpbh_ps): Likewise.
+
+2021-12-23 Feng Xue <fxue@os.amperecomputing.com>
+
+ PR ipa/103786
+ * tree.c (verify_type): Fix typo.
+
+2021-12-23 liuhongt <hongtao.liu@intel.com>
+
+ PR target/103750
+ * config/i386/sse.md
+ (*<avx512>_cmp<V48H_AVX512VL:mode>3_zero_extend<SWI248x:mode>):
+ New pre_reload define_insn_and_split.
+ (*<avx512>_cmp<VI12_AVX512VL:mode>3_zero_extend<SWI248x:mode>):
+ Ditto.
+ (*<avx512>_ucmp<VI12_AVX512VL:mode>3_zero_extend<SWI248x:mode>):
+ Ditto.
+ (*<avx512>_ucmp<VI48_AVX512VL:mode>3_zero_extend<SWI248x:mode>):
+ Ditto.
+ (*<avx512>_cmp<V48H_AVX512VL:mode>3_zero_extend<SWI248x:mode>_2):
+ Ditto.
+ (*<avx512>_cmp<VI12_AVX512VL:mode>3_zero_extend<SWI248x:mode>_2):
+ Ditto.
+ (*<avx512>_ucmp<VI12_AVX512VL:mode>3_zero_extend<SWI248x:mode>_2):
+ Ditto.
+ (*<avx512>_ucmp<VI48_AVX512VL:mode>3_zero_extend<SWI248x:mode>_2):
+ Ditto.
+
2021-12-22 Murray Steele <murray.steele@arm.com>
* config.gcc (arm*-*-*): Add arm-mve-builtins.o to extra_objs.
diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index 5ecdb01afb5..14fac3af34a 100644
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20211223
+20211224
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 14e795c9241..830999187d2 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,30 @@
+2021-12-23 H.J. Lu <hjl.tools@gmail.com>
+
+ * gcc.target/i386/smuldi3_highpart.c: Replace long with long long.
+
+2021-12-23 Roger Sayle <roger@nextmovesoftware.com>
+ Uroš Bizjak <ubizjak@gmail.com>
+
+ PR target/103773
+ * gcc.target/i386/pr103773-2.c: New test case.
+ * gcc.target/i386/pr103773.c: New test case.
+
+2021-12-23 konglin1 <lingling.kong@intel.com>
+
+ * gcc.target/i386/avx512bf16-cvtsbh2ss-1.c: New test.
+ * gcc.target/i386/avx512bf16-vcvtpbh2ps-1.c: Ditto.
+ * gcc.target/i386/avx512bf16vl-cvtness2sbh-1.c: Ditto.
+ * gcc.target/i386/avx512bf16vl-vcvtpbh2ps-1.c: Ditto.
+
+2021-12-23 liuhongt <hongtao.liu@intel.com>
+
+ * gcc.target/i386/avx512bw-pr103750-1.c: New test.
+ * gcc.target/i386/avx512bw-pr103750-2.c: New test.
+ * gcc.target/i386/avx512f-pr103750-1.c: New test.
+ * gcc.target/i386/avx512f-pr103750-2.c: New test.
+ * gcc.target/i386/avx512fp16-pr103750-1.c: New test.
+ * gcc.target/i386/avx512fp16-pr103750-2.c: New test.
+
2021-12-22 Harald Anlauf <anlauf@gmx.de>
PR fortran/103778
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