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* [gcc r12-6767] arm: Add test for AES erratum mitigation
@ 2022-01-20 11:29 Richard Earnshaw
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From: Richard Earnshaw @ 2022-01-20 11:29 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:9b42782366b705d9ecd24020ab35fe7eee045c4e
commit r12-6767-g9b42782366b705d9ecd24020ab35fe7eee045c4e
Author: Richard Earnshaw <rearnsha@arm.com>
Date: Mon Jan 17 13:57:37 2022 +0000
arm: Add test for AES erratum mitigation
Add a testcase for the erratum mitigation. To improve coverage
use -dp on the assembler output and match the pattern names (and where
needed the alternative number).
gcc/testsuite/ChangeLog:
* gcc.target/arm/crypto-vaese-erratum1.c: New test.
Diff:
---
.../gcc.target/arm/crypto-vaese-erratum1.c | 28 ++++++++++++++++++++++
1 file changed, 28 insertions(+)
diff --git a/gcc/testsuite/gcc.target/arm/crypto-vaese-erratum1.c b/gcc/testsuite/gcc.target/arm/crypto-vaese-erratum1.c
new file mode 100644
index 00000000000..3f16688a8aa
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/crypto-vaese-erratum1.c
@@ -0,0 +1,28 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_crypto_ok } */
+/* { dg-options "-O2 -mfix-cortex-a57-aes-1742098 -dp" } */
+/* { dg-add-options arm_crypto } */
+
+#include "arm_neon.h"
+
+uint8x16_t
+foo (uint8x16_t v)
+{
+ const uint8x16_t key1 = {0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
+ 0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f};
+ const uint8x16_t key2 = {0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
+ 0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f};
+ int i;
+
+ for (i = 0; i < 16; ++i)
+ {
+ v = vaesmcq_u8 (vaeseq_u8 (v, key1));
+ v = vaesmcq_u8 (vaeseq_u8 (v, key2));
+ }
+ return v;
+}
+
+/* { dg-final { scan-assembler "aese.8\tq\[0-9\]+, q\[0-9\]+" } } */
+/* { dg-final { scan-assembler-times "aes_op_protect/2" 2} } */
+/* { dg-final { scan-assembler-times "aes_op_protect/0" 1} } */
+/* { dg-final { scan-assembler-times "(?:aesmc|aese_fused)_protected" 1} } */
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