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* [gcc(refs/users/meissner/heads/work076)] Remove setting prefixed attribute for vecperm type
@ 2022-01-21 4:53 Michael Meissner
0 siblings, 0 replies; only message in thread
From: Michael Meissner @ 2022-01-21 4:53 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:069971bbd369898dcd36fb9121208433b8c7665a
commit 069971bbd369898dcd36fb9121208433b8c7665a
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Thu Jan 20 23:53:10 2022 -0500
Remove setting prefixed attribute for vecperm type
Pat pointed out that with my patch to PR target/104136, that I could go
further and eliminate setting the prefixed attribute to yes when an
xxspltiw, xxspltidp, or xxsplti32dx is generated, since those insns now
always set the prefixed attribute directly. I removed all of the places
that were used to set the attribute, since they won't be called.
I also added setting an explicit 'prefixed' attribute to the places where
we are loading floating point scalar constants. These instructions will
be split, and the resulting insn is marked as being prefixed. Setting the
attribute directly means it will be set before doing the split.
gcc/
2022-01-20 Michael Meissner <meissner@the-meissners.org>
* config/rs6000/rs6000-protos.h (prefixed_xxsplti_p): Delete.
* config/rs6000/rs6000.c (prefixed_xxsplti_p): Delete.
* config/rs6000/rs6000.md (prefixed attribute): Do not check for
xxspltiw or xxspltidp instructions.
(mov<mode>_hardfloat32): Explicitly set the prefixed attribute
when we will be loading a constant with xxspltiw or xxspltidp.
(mov<mode>_hardfloat64): Likewise.
Diff:
---
gcc/config/rs6000/rs6000-protos.h | 1 -
gcc/config/rs6000/rs6000.cc | 38 --------------------------------------
gcc/config/rs6000/rs6000.md | 24 ++++++++++++++++--------
3 files changed, 16 insertions(+), 47 deletions(-)
diff --git a/gcc/config/rs6000/rs6000-protos.h b/gcc/config/rs6000/rs6000-protos.h
index e322ac0c199..3ea01023609 100644
--- a/gcc/config/rs6000/rs6000-protos.h
+++ b/gcc/config/rs6000/rs6000-protos.h
@@ -199,7 +199,6 @@ enum non_prefixed_form reg_to_non_prefixed (rtx reg, machine_mode mode);
extern bool prefixed_load_p (rtx_insn *);
extern bool prefixed_store_p (rtx_insn *);
extern bool prefixed_paddi_p (rtx_insn *);
-extern bool prefixed_xxsplti_p (rtx_insn *);
extern void rs6000_asm_output_opcode (FILE *);
extern void output_pcrel_opt_reloc (rtx);
extern void rs6000_final_prescan_insn (rtx_insn *, rtx [], int);
diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index b34962da27d..7b8a3b5299a 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -26617,44 +26617,6 @@ prefixed_paddi_p (rtx_insn *insn)
return (iform == INSN_FORM_PCREL_EXTERNAL || iform == INSN_FORM_PCREL_LOCAL);
}
-/* Whether an instruction is a prefixed XXSPLTI* instruction. This is called
- from the prefixed attribute processing. */
-
-bool
-prefixed_xxsplti_p (rtx_insn *insn)
-{
- rtx set = single_set (insn);
- if (!set)
- return false;
-
- rtx dest = SET_DEST (set);
- rtx src = SET_SRC (set);
- machine_mode mode = GET_MODE (dest);
-
- if (!REG_P (dest) && !SUBREG_P (dest))
- return false;
-
- if (GET_CODE (src) == UNSPEC)
- {
- int unspec = XINT (src, 1);
- return (unspec == UNSPEC_XXSPLTIW
- || unspec == UNSPEC_XXSPLTIDP
- || unspec == UNSPEC_XXSPLTI32DX);
- }
-
- vec_const_128bit_type vsx_const;
- if (vec_const_128bit_to_bytes (src, mode, &vsx_const))
- {
- if (constant_generates_xxspltiw (&vsx_const))
- return true;
-
- if (constant_generates_xxspltidp (&vsx_const))
- return true;
- }
-
- return false;
-}
-
/* Whether the next instruction needs a 'p' prefix issued before the
instruction is printed out. */
static bool prepend_p_to_next_insn;
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index 59531b6d07e..4e221189028 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -314,11 +314,6 @@
(eq_attr "type" "integer,add")
(if_then_else (match_test "prefixed_paddi_p (insn)")
- (const_string "yes")
- (const_string "no"))
-
- (eq_attr "type" "vecperm")
- (if_then_else (match_test "prefixed_xxsplti_p (insn)")
(const_string "yes")
(const_string "no"))]
@@ -7857,7 +7852,11 @@
(set_attr "isa"
"*, *, p9v, p8v, *, p9v,
p8v, *, *, *, *, *,
- *, *, *, *, p10")])
+ *, *, *, *, p10")
+ (set_attr "prefixed"
+ "*, *, *, *, *, *,
+ *, *, *, *, *, *,
+ *, *, *, *, yes")])
;; LWZ LFIWZX STW STFIWX MTVSRWZ MFVSRWZ
;; FMR MR MT%0 MF%1 NOP
@@ -8159,7 +8158,11 @@
(set_attr "isa"
"*, *, *, p9v, p9v,
p7v, p7v, *, *, *,
- *, *, *, p10")])
+ *, *, *, p10")
+ (set_attr "prefixed"
+ "*, *, *, *, *,
+ *, *, *, *, *,
+ *, *, *, yes")])
;; STW LWZ MR G-const H-const F-const
@@ -8232,7 +8235,12 @@
"*, *, *, p9v, p9v,
p7v, p7v, *, *, *,
*, *, *, *, *,
- *, p8v, p8v, p10")])
+ *, p8v, p8v, p10")
+ (set_attr "prefixed"
+ "*, *, *, *, *,
+ *, *, *, *, *,
+ *, *, *, *, *,
+ *, *, *, *")])
;; STD LD MR MT<SPR> MF<SPR> G-const
;; H-const F-const Special
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