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* [gcc r12-6916] RISC-V: Document `auipc' and `bitmanip' `type' attributes
@ 2022-01-28 11:56 Maciej W. Rozycki
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From: Maciej W. Rozycki @ 2022-01-28 11:56 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:833e651a76cbab26d18307fe761b609c0fa61439
commit r12-6916-g833e651a76cbab26d18307fe761b609c0fa61439
Author: Maciej W. Rozycki <macro@embecosm.com>
Date: Fri Jan 28 11:55:12 2022 +0000
RISC-V: Document `auipc' and `bitmanip' `type' attributes
Document new `auipc' and `bitmanip' `type' attributes added respectively
with commit 88108b27dda9 ("RISC-V: Add sifive-7 pipeline description.")
and commit 283b1707f237 ("RISC-V: Implement instruction patterns for ZBA
extension.") but not listed so far.
gcc/
* config/riscv/riscv.md: Document `auipc' and `bitmanip' `type'
attributes.
Diff:
---
gcc/config/riscv/riscv.md | 2 ++
1 file changed, 2 insertions(+)
diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md
index 04923927bc2..b3c5bce842a 100644
--- a/gcc/config/riscv/riscv.md
+++ b/gcc/config/riscv/riscv.md
@@ -150,6 +150,7 @@
;; mfc transfer from coprocessor
;; const load constant
;; arith integer arithmetic instructions
+;; auipc integer addition to PC
;; logical integer logical instructions
;; shift integer shift instructions
;; slt set less than instructions
@@ -167,6 +168,7 @@
;; multi multiword sequence (or user asm statements)
;; nop no operation
;; ghost an instruction that produces no real code
+;; bitmanip bit manipulation instructions
(define_attr "type"
"unknown,branch,jump,call,load,fpload,store,fpstore,
mtc,mfc,const,arith,logical,shift,slt,imul,idiv,move,fmove,fadd,fmul,
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