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* [gcc r11-9529] Strengthen memory order for atomic<T>::wait/notify
@ 2022-02-01 17:17 Thomas Rodgers
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From: Thomas Rodgers @ 2022-02-01 17:17 UTC (permalink / raw)
To: gcc-cvs, libstdc++-cvs
https://gcc.gnu.org/g:f0343391816c34e85d378131ec436d2145befefb
commit r11-9529-gf0343391816c34e85d378131ec436d2145befefb
Author: Thomas Rodgers <rodgert@appliantology.com>
Date: Mon Jan 31 13:39:44 2022 -0800
Strengthen memory order for atomic<T>::wait/notify
This matches the memory order in libc++.
libstdc++-v3/ChangeLog:
* include/bits/atomic_wait.h: Change memory order from
Acquire/Release with relaxed loads to SeqCst+Release for
accesses to the waiter's count.
(cherry picked from commit 07a971b28c880938bb7e070465ab8ee6ccdad1fb)
Diff:
---
libstdc++-v3/include/bits/atomic_wait.h | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/libstdc++-v3/include/bits/atomic_wait.h b/libstdc++-v3/include/bits/atomic_wait.h
index 35c92644146..f6a1c0d8c32 100644
--- a/libstdc++-v3/include/bits/atomic_wait.h
+++ b/libstdc++-v3/include/bits/atomic_wait.h
@@ -211,18 +211,18 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
void
_M_enter_wait() noexcept
- { __atomic_fetch_add(&_M_wait, 1, __ATOMIC_ACQ_REL); }
+ { __atomic_fetch_add(&_M_wait, 1, __ATOMIC_SEQ_CST); }
void
_M_leave_wait() noexcept
- { __atomic_fetch_sub(&_M_wait, 1, __ATOMIC_ACQ_REL); }
+ { __atomic_fetch_sub(&_M_wait, 1, __ATOMIC_RELEASE); }
bool
_M_waiting() const noexcept
{
__platform_wait_t __res;
- __atomic_load(&_M_wait, &__res, __ATOMIC_ACQUIRE);
- return __res > 0;
+ __atomic_load(&_M_wait, &__res, __ATOMIC_SEQ_CST);
+ return __res != 0;
}
void
@@ -260,7 +260,7 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
__platform_wait(__addr, __old);
#else
__platform_wait_t __val;
- __atomic_load(__addr, &__val, __ATOMIC_RELAXED);
+ __atomic_load(__addr, &__val, __ATOMIC_SEQ_CST);
if (__val == __old)
{
lock_guard<mutex> __l(_M_mtx);
@@ -311,7 +311,7 @@ _GLIBCXX_BEGIN_NAMESPACE_VERSION
{
if (_M_laundered())
{
- __atomic_fetch_add(_M_addr, 1, __ATOMIC_ACQ_REL);
+ __atomic_fetch_add(_M_addr, 1, __ATOMIC_SEQ_CST);
__all = true;
}
_M_w._M_notify(_M_addr, __all, __bare);
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