[gcc r12-7079] rs6000: Move the hunk affecting VSX/ALTIVEC ahead [PR103627]

[gcc r12-7079] rs6000: Move the hunk affecting VSX/ALTIVEC ahead [PR103627]

[Kewen Lin]

https://gcc.gnu.org/g:e66ba0f55c000152df63fc67c11a64f79122ef86

commit r12-7079-ge66ba0f55c000152df63fc67c11a64f79122ef86
Author: Kewen Lin <linkw@linux.ibm.com>
Date:   Sun Feb 6 21:30:02 2022 -0600

    rs6000: Move the hunk affecting VSX/ALTIVEC ahead [PR103627]
    
    The modified hunk can update VSX and ALTIVEC flag, we have some codes
    to check/warn for some flags related to VSX and ALTIVEC sitting where
    the hunk is proprosed to be moved to.  Without this adjustment, the
    VSX and ALTIVEC update is too late, it can cause the incompatibility
    and result in unexpected behaviors, the associated test case is one
    typical case.
    
    Since we already have the code which sets TARGET_FLOAT128_TYPE and lays
    after the moved place, and OPTION_MASK_FLOAT128_KEYWORD will rely on
    TARGET_FLOAT128_TYPE, so it just simply remove them.
    
    gcc/ChangeLog:
    
            PR target/103627
            * config/rs6000/rs6000.cc (rs6000_option_override_internal): Move the
            hunk affecting VSX and ALTIVEC to appropriate place.
    
    gcc/testsuite/ChangeLog:
    
            PR target/103627
            * gcc.target/powerpc/pr103627-3.c: New test.

Diff:
---
 gcc/config/rs6000/rs6000.cc                   | 21 +++++++++------------
 gcc/testsuite/gcc.target/powerpc/pr103627-3.c | 20 ++++++++++++++++++++
 2 files changed, 29 insertions(+), 12 deletions(-)

diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index a2843d1caef..e571a0b1c96 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -3934,6 +3934,15 @@ rs6000_option_override_internal (bool global_init_p)
   else if (TARGET_ALTIVEC)
     rs6000_isa_flags |= (OPTION_MASK_PPC_GFXOPT & ~ignore_masks);
 
+  /* Disable VSX and Altivec silently if the user switched cpus to power7 in a
+     target attribute or pragma which automatically enables both options,
+     unless the altivec ABI was set.  This is set by default for 64-bit, but
+     not for 32-bit.  Don't move this before the above code using ignore_masks,
+     since it can reset the cleared VSX/ALTIVEC flag again.  */
+  if (main_target_opt && !main_target_opt->x_rs6000_altivec_abi)
+    rs6000_isa_flags &= ~((OPTION_MASK_VSX | OPTION_MASK_ALTIVEC)
+			  & ~rs6000_isa_flags_explicit);
+
   if (TARGET_CRYPTO && !TARGET_ALTIVEC)
     {
       if (rs6000_isa_flags_explicit & OPTION_MASK_CRYPTO)
@@ -4350,18 +4359,6 @@ rs6000_option_override_internal (bool global_init_p)
 	}
     }
 
-  /* Disable VSX and Altivec silently if the user switched cpus to power7 in a
-     target attribute or pragma which automatically enables both options,
-     unless the altivec ABI was set.  This is set by default for 64-bit, but
-     not for 32-bit.  */
-  if (main_target_opt != NULL && !main_target_opt->x_rs6000_altivec_abi)
-    {
-      TARGET_FLOAT128_TYPE = 0;
-      rs6000_isa_flags &= ~((OPTION_MASK_VSX | OPTION_MASK_ALTIVEC
-			     | OPTION_MASK_FLOAT128_KEYWORD)
-			    & ~rs6000_isa_flags_explicit);
-    }
-
   /* Enable Altivec ABI for AIX -maltivec.  */
   if (TARGET_XCOFF
       && (TARGET_ALTIVEC || TARGET_VSX)
diff --git a/gcc/testsuite/gcc.target/powerpc/pr103627-3.c b/gcc/testsuite/gcc.target/powerpc/pr103627-3.c
new file mode 100644
index 00000000000..5a4d5ba5701
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr103627-3.c
@@ -0,0 +1,20 @@
+/* There are no error messages for either LE or BE 64bit.  */
+/* { dg-require-effective-target be } */
+/* { dg-require-effective-target ilp32 } */
+/* { dg-options "-mdejagnu-cpu=power6" } */
+
+/* Verify compiler emits error message instead of ICE.  */
+
+/* Option -mno-avoid-indexed-addresses is to disable the unexpected
+   warning on indexed addressing which can affect dg checks.  */
+#pragma GCC target "cpu=power10,no-avoid-indexed-addresses"
+int
+main ()
+{
+  float *b;
+  __vector_quad c;
+  __builtin_mma_disassemble_acc (b, &c);
+  /* { dg-error "'__builtin_mma_disassemble_acc' requires the '-mmma' option" "" { target *-*-* } .-1 } */
+  return 0;
+}
+