[gcc r11-9560] rs6000: Fix up flag_shrink_wrap handling in presence of -mrop-protect [PR101324]

[gcc r11-9560] rs6000: Fix up flag_shrink_wrap handling in presence of -mrop-protect [PR101324]

[Peter Bergner]

https://gcc.gnu.org/g:c56c398c39f6195c3d158f02514c33b7da73ebc2

commit r11-9560-gc56c398c39f6195c3d158f02514c33b7da73ebc2
Author: Martin Liska <mliska@suse.cz>
Date:   Fri Dec 3 11:58:25 2021 -0600

    rs6000: Fix up flag_shrink_wrap handling in presence of -mrop-protect [PR101324]
    
    PR101324 shows a problem in disabling shrink-wrapping when using -mrop-protect
    when there is a attribute optimize/pragma.  The fix envolves moving the handling
    of flag_shrink_wrap so it gets re-disbled when we change or add options.
    
    2021-12-03  Martin Liska  <mliska@suse.cz>
    
    gcc/
            PR target/101324
            * config/rs6000/rs6000.c (rs6000_option_override_internal): Move the
            disabling of shrink-wrapping when using -mrop-protect from here...
            (rs6000_override_options_after_change): ...to here.
    
    2021-12-03  Peter Bergner  <bergner@linux.ibm.com>
    
    gcc/testsuite/
            PR target/101324
            * gcc.target/powerpc/pr101324.c: New test.
    
    (cherry picked from commit cff7879a381d3f5ed6556206896e6a6229800167)

Diff:
---
 gcc/config/rs6000/rs6000.c                  |  8 ++++----
 gcc/testsuite/gcc.target/powerpc/pr101324.c | 17 +++++++++++++++++
 2 files changed, 21 insertions(+), 4 deletions(-)

diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index 9b1c3a8b5ea..ae13c3ab825 100644
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -3454,6 +3454,10 @@ rs6000_override_options_after_change (void)
     }
   else if (!global_options_set.x_flag_cunroll_grow_size)
     flag_cunroll_grow_size = flag_peel_loops || optimize >= 3;
+
+  /* If we are inserting ROP-protect instructions, disable shrink wrap.  */
+  if (rs6000_rop_protect)
+    flag_shrink_wrap = 0;
 }
 
 #ifdef TARGET_USES_LINUX64_OPT
@@ -4018,10 +4022,6 @@ rs6000_option_override_internal (bool global_init_p)
       && ((rs6000_isa_flags_explicit & OPTION_MASK_QUAD_MEMORY_ATOMIC) == 0))
     rs6000_isa_flags |= OPTION_MASK_QUAD_MEMORY_ATOMIC;
 
-  /* If we are inserting ROP-protect instructions, disable shrink wrap.  */
-  if (rs6000_rop_protect)
-    flag_shrink_wrap = 0;
-
   /* If we can shrink-wrap the TOC register save separately, then use
      -msave-toc-indirect unless explicitly disabled.  */
   if ((rs6000_isa_flags_explicit & OPTION_MASK_SAVE_TOC_INDIRECT) == 0
diff --git a/gcc/testsuite/gcc.target/powerpc/pr101324.c b/gcc/testsuite/gcc.target/powerpc/pr101324.c
new file mode 100644
index 00000000000..ca0fca80213
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/pr101324.c
@@ -0,0 +1,17 @@
+/* { dg-require-effective-target rop_ok } */
+/* { dg-options "-O1 -mrop-protect -mdejagnu-cpu=power10" } */
+
+extern void foo (void);
+
+long int
+__attribute__ ((__optimize__ ("no-inline")))
+func (long int cond)
+{
+  if (cond)
+    foo ();
+  return cond;
+}
+
+/* Ensure hashst comes after mflr and hashchk comes after ld 0,16(1).  */
+/* { dg-final { scan-assembler {(?p)\mmflr 0.*\n.*\n.*\mhashst 0,} } } */
+/* { dg-final { scan-assembler {(?p)ld 0,.*\n.*\n.*\n.*\mhashchk 0,} } } */