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* [gcc(refs/vendors/ARM/heads/morello)] morello: Fix ICE in mem_loc_descriptor, at dwarf2out.c:15532
@ 2022-02-28 12:09 Matthew Malcomson
  0 siblings, 0 replies; only message in thread
From: Matthew Malcomson @ 2022-02-28 12:09 UTC (permalink / raw)
  To: gcc-cvs

https://gcc.gnu.org/g:aa52757d0a0d0b390510e857ea1485cbd2491aba

commit aa52757d0a0d0b390510e857ea1485cbd2491aba
Author: Stam Markianos-Wright <stam.markianos-wright@arm.com>
Date:   Fri Feb 4 11:14:08 2022 +0000

    morello: Fix ICE in mem_loc_descriptor, at dwarf2out.c:15532
    
    This patch fixes an ICE that due in dwarf2out.c due to a a previously
    malformed SUBREG created in the pro_and_epilogue pass.
    
    The bad subreg was being formed in valtrack.c:dead_debug_insert_temp
    where a hard-reg mode conversion was being done without a check against
    `aarch64_can_change_mode_class`. This check has now been added.
    The conversion was being deemed necessary because of some architecturally
    incompatible PAC code in `aarch64_return_addr_rtx`.
    This is now conditional on `!TARGET_MORELLO`.
    
    Finally, this patch also fixes a previously overlooked vulnerability in
    `aarch64_can_change_mode_class`, where we'd forgotten to return false
    on conversions to capabilities.

Diff:
---
 gcc/config/aarch64/aarch64.c                            |  3 ++-
 gcc/dwarf2out.c                                         | 11 ++++++-----
 .../aarch64/morello/paradoxical-cadi-subreg.c           | 17 +++++++++++++++++
 gcc/valtrack.c                                          |  7 ++++++-
 4 files changed, 31 insertions(+), 7 deletions(-)

diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index a3d1aaf786f..cf18d63dc30 100644
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -11586,7 +11586,8 @@ aarch64_return_addr_rtx (void)
      be signed or not.  */
   rtx lr = gen_rtx_REG (Pmode, LR_REGNUM);
   emit_move_insn (lr, val);
-  emit_insn (GEN_FCN (CODE_FOR_xpaclri) ());
+  if (!TARGET_MORELLO)
+    emit_insn (GEN_FCN (CODE_FOR_xpaclri) ());
   return lr;
 }
 
diff --git a/gcc/dwarf2out.c b/gcc/dwarf2out.c
index 8e560f6c0d8..652a63c6a1e 100644
--- a/gcc/dwarf2out.c
+++ b/gcc/dwarf2out.c
@@ -15509,7 +15509,7 @@ mem_loc_descriptor (rtx rtl, machine_mode mode,
   if (mode != GET_MODE (rtl) && GET_MODE (rtl) != VOIDmode)
     return NULL;
 
-  scalar_addr_mode addr_mode, inner_addr_mode;
+  scalar_addr_mode addr_mode, inner_addr_mode, outer_addr_mode;
   scalar_int_mode int_mode = BImode, inner_mode, op1_mode;
   switch (GET_CODE (rtl))
     {
@@ -15539,12 +15539,12 @@ mem_loc_descriptor (rtx rtl, machine_mode mode,
     case TRUNCATE:
       if (inner == NULL_RTX)
         inner = XEXP (rtl, 0);
-      gcc_assert(! CAPABILITY_MODE_P (mode));
-      if (is_a <scalar_int_mode> (mode, &int_mode)
+
+      if (is_a <scalar_addr_mode> (mode, &outer_addr_mode)
 	  && is_a <scalar_addr_mode> (GET_MODE (inner), &inner_addr_mode)
-	  && (GET_MODE_SIZE (int_mode) <= DWARF2_ADDR_SIZE
+	  && (GET_NONCAP_MODE_SIZE (outer_addr_mode) <= DWARF2_ADDR_SIZE
 #ifdef POINTERS_EXTEND_UNSIGNED
-	      || (int_mode == Pmode && mem_mode != VOIDmode)
+	      || (outer_addr_mode == Pmode && mem_mode != VOIDmode)
 #endif
 	     )
 	  && GET_NONCAP_MODE_SIZE (inner_addr_mode) <= DWARF2_ADDR_SIZE)
@@ -15554,6 +15554,7 @@ mem_loc_descriptor (rtx rtl, machine_mode mode,
 					       mem_mode, initialized);
 	  break;
 	}
+      gcc_assert(! CAPABILITY_MODE_P (mode));
       if (dwarf_strict && dwarf_version < 5)
 	break;
       if (is_a <scalar_int_mode> (mode, &int_mode)
diff --git a/gcc/testsuite/gcc.target/aarch64/morello/paradoxical-cadi-subreg.c b/gcc/testsuite/gcc.target/aarch64/morello/paradoxical-cadi-subreg.c
new file mode 100644
index 00000000000..72715ce523f
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/morello/paradoxical-cadi-subreg.c
@@ -0,0 +1,17 @@
+/* { dg-do compile } */
+/* This would previously trigger an ICE in dwarf2out.c due to the earlier
+   the creation of a paradoxical CADImode SUBREG of a DImode value.  This
+   should now be supported.  */
+int d (void) {
+  volatile int x = 1;
+  return x;
+}
+
+int main () {
+  __uintcap_t b = (__uintcap_t) __builtin_return_address(0);
+ volatile int i;
+ for (i = 0; i < 4 ; i++)
+   for ( ;; b && d())
+    ;
+  return 0;
+}
\ No newline at end of file
diff --git a/gcc/valtrack.c b/gcc/valtrack.c
index 42c5950aca1..74259f25fa8 100644
--- a/gcc/valtrack.c
+++ b/gcc/valtrack.c
@@ -30,6 +30,8 @@ along with GCC; see the file COPYING3.  If not see
 #include "memmodel.h"
 #include "emit-rtl.h"
 #include "rtl-iter.h"
+#include "tm_p.h"
+#include "target.h"
 
 /* gen_lowpart_no_emit hook implementation for DEBUG_INSNs.  In DEBUG_INSNs,
    all lowpart SUBREGs are valid, despite what the machine requires for
@@ -686,10 +688,13 @@ dead_debug_insert_temp (struct dead_debug_local *debug, unsigned int uregno,
 	    breg = NULL;
 	  /* Ok, it's the same (hardware) REG, but with a different
 	     mode, so SUBREG it.  */
-	  else
+	  else if (REG_CAN_CHANGE_MODE_P (REGNO (reg), GET_MODE (dest),
+					  GET_MODE (reg)))
 	    breg = debug_lowpart_subreg (GET_MODE (reg),
 					 cleanup_auto_inc_dec (src, VOIDmode),
 					 GET_MODE (dest));
+	  else
+	    breg = NULL;
 	}
       else if (GET_CODE (dest) == SUBREG)
 	{


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