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* [gcc r12-7472] x86: Always return pseudo register in ix86_gen_scratch_sse_rtx
@ 2022-03-04 3:02 H.J. Lu
0 siblings, 0 replies; only message in thread
From: H.J. Lu @ 2022-03-04 3:02 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:609e8c492d62d92465460eae3d43dfc4b2c68288
commit r12-7472-g609e8c492d62d92465460eae3d43dfc4b2c68288
Author: H.J. Lu <hjl.tools@gmail.com>
Date: Sat Feb 26 14:17:23 2022 -0800
x86: Always return pseudo register in ix86_gen_scratch_sse_rtx
ix86_gen_scratch_sse_rtx returns XMM7/XMM15/XMM31 as a scratch vector
register to prevent RTL optimizers from removing vector register. It
introduces a conflict with explicit XMM7/XMM15/XMM31 usage and when it
is called by RTL optimizers, it may introduce conflicting usages of
XMM7/XMM15/XMM31.
Change ix86_gen_scratch_sse_rtx to always return a pseudo register and
xfail x86 tests which are optimized with a hard scratch register.
gcc/
PR target/104704
* config/i386/i386.cc (ix86_gen_scratch_sse_rtx): Always return
a pseudo register.
gcc/testsuite/
PR target/104704
* gcc.target/i386/incoming-11.c: Xfail.
* gcc.target/i386/pieces-memset-3.c: Likewise.
* gcc.target/i386/pieces-memset-37.c: Likewise.
* gcc.target/i386/pieces-memset-39.c: Likewise.
* gcc.target/i386/pieces-memset-46.c: Likewise.
* gcc.target/i386/pieces-memset-47.c: Likewise.
* gcc.target/i386/pieces-memset-48.c: Likewise.
* gcc.target/i386/pr90773-5.c: Likewise.
* gcc.target/i386/pr90773-14.c: Likewise.
* gcc.target/i386/pr90773-17.c: Likewise.
* gcc.target/i386/pr100865-8a.c: Likewise.
* gcc.target/i386/pr100865-8c.c: Likewise.
* gcc.target/i386/pr100865-9c.c: Likewise.
* gcc.target/i386/pieces-memset-21.c: Always expect vzeroupper.
* gcc.target/i386/pr82941-1.c: Likewise.
* gcc.target/i386/pr82942-1.c: Likewise.
* gcc.target/i386/pr82990-1.c: Likewise.
* gcc.target/i386/pr82990-3.c: Likewise.
* gcc.target/i386/pr82990-5.c: Likewise.
* gcc.target/i386/pr100865-11b.c: Expect vmovdqa instead of
vmovdqa64.
* gcc.target/i386/pr100865-12b.c: Likewise.
* gcc.target/i386/pr100865-8b.c: Likewise.
* gcc.target/i386/pr100865-9b.c: Likewise.
* gcc.target/i386/pr104704-1.c: New test.
* gcc.target/i386/pr104704-2.c: Likewise.
* gcc.target/i386/pr104704-3.c: Likewise.
* gcc.target/i386/pr104704-4.c: Likewise.
* gcc.target/i386/pr104704-5.c: Likewise.
* gcc.target/i386/pr104704-6.c: Likewise.
Diff:
---
gcc/config/i386/i386.cc | 19 +-------------
gcc/testsuite/gcc.target/i386/incoming-11.c | 2 +-
gcc/testsuite/gcc.target/i386/pieces-memset-21.c | 3 +--
gcc/testsuite/gcc.target/i386/pieces-memset-3.c | 4 +--
gcc/testsuite/gcc.target/i386/pieces-memset-37.c | 4 +--
gcc/testsuite/gcc.target/i386/pieces-memset-39.c | 4 +--
gcc/testsuite/gcc.target/i386/pieces-memset-46.c | 2 +-
gcc/testsuite/gcc.target/i386/pieces-memset-47.c | 2 +-
gcc/testsuite/gcc.target/i386/pieces-memset-48.c | 2 +-
gcc/testsuite/gcc.target/i386/pr100865-11b.c | 2 +-
gcc/testsuite/gcc.target/i386/pr100865-12b.c | 2 +-
gcc/testsuite/gcc.target/i386/pr100865-8a.c | 2 +-
gcc/testsuite/gcc.target/i386/pr100865-8b.c | 2 +-
gcc/testsuite/gcc.target/i386/pr100865-8c.c | 2 +-
gcc/testsuite/gcc.target/i386/pr100865-9b.c | 2 +-
gcc/testsuite/gcc.target/i386/pr100865-9c.c | 2 +-
gcc/testsuite/gcc.target/i386/pr104704-1.c | 33 ++++++++++++++++++++++++
gcc/testsuite/gcc.target/i386/pr104704-2.c | 33 ++++++++++++++++++++++++
gcc/testsuite/gcc.target/i386/pr104704-3.c | 33 ++++++++++++++++++++++++
gcc/testsuite/gcc.target/i386/pr104704-4.c | 33 ++++++++++++++++++++++++
gcc/testsuite/gcc.target/i386/pr104704-5.c | 33 ++++++++++++++++++++++++
gcc/testsuite/gcc.target/i386/pr104704-6.c | 33 ++++++++++++++++++++++++
gcc/testsuite/gcc.target/i386/pr82941-1.c | 3 +--
gcc/testsuite/gcc.target/i386/pr82942-1.c | 3 +--
gcc/testsuite/gcc.target/i386/pr82990-1.c | 3 +--
gcc/testsuite/gcc.target/i386/pr82990-3.c | 3 +--
gcc/testsuite/gcc.target/i386/pr82990-5.c | 3 +--
gcc/testsuite/gcc.target/i386/pr90773-14.c | 2 +-
gcc/testsuite/gcc.target/i386/pr90773-17.c | 2 +-
gcc/testsuite/gcc.target/i386/pr90773-5.c | 2 +-
30 files changed, 225 insertions(+), 50 deletions(-)
diff --git a/gcc/config/i386/i386.cc b/gcc/config/i386/i386.cc
index b2bf90576d5..95219902694 100644
--- a/gcc/config/i386/i386.cc
+++ b/gcc/config/i386/i386.cc
@@ -23786,24 +23786,7 @@ ix86_optab_supported_p (int op, machine_mode mode1, machine_mode,
rtx
ix86_gen_scratch_sse_rtx (machine_mode mode)
{
- if (TARGET_SSE && !lra_in_progress)
- {
- unsigned int regno;
- if (TARGET_64BIT)
- {
- /* In 64-bit mode, use XMM31 to avoid vzeroupper and always
- use XMM31 for CSE. */
- if (ix86_hard_regno_mode_ok (LAST_EXT_REX_SSE_REG, mode))
- regno = LAST_EXT_REX_SSE_REG;
- else
- regno = LAST_REX_SSE_REG;
- }
- else
- regno = LAST_SSE_REG;
- return gen_rtx_REG (mode, regno);
- }
- else
- return gen_reg_rtx (mode);
+ return gen_reg_rtx (mode);
}
/* Address space support.
diff --git a/gcc/testsuite/gcc.target/i386/incoming-11.c b/gcc/testsuite/gcc.target/i386/incoming-11.c
index 4b822684b88..a06fdee477d 100644
--- a/gcc/testsuite/gcc.target/i386/incoming-11.c
+++ b/gcc/testsuite/gcc.target/i386/incoming-11.c
@@ -15,4 +15,4 @@ void f()
for (i = 0; i < 100; i++) q[i] = 1;
}
-/* { dg-final { scan-assembler-not "andl\[\\t \]*\\$-16,\[\\t \]*%esp" } } */
+/* { dg-final { scan-assembler-not "andl\[\\t \]*\\$-16,\[\\t \]*%esp" { xfail *-*-* } } } */
diff --git a/gcc/testsuite/gcc.target/i386/pieces-memset-21.c b/gcc/testsuite/gcc.target/i386/pieces-memset-21.c
index 4e2a7407c8a..a04f7eb55c7 100644
--- a/gcc/testsuite/gcc.target/i386/pieces-memset-21.c
+++ b/gcc/testsuite/gcc.target/i386/pieces-memset-21.c
@@ -11,8 +11,7 @@ foo (void)
/* { dg-final { scan-assembler-times "vpxor(?:d|)\[ \\t\]+\[^\n\]*%xmm" 1 } } */
/* { dg-final { scan-assembler-times "vmovdqu(?:64|8)\[ \\t\]+\[^\n\]*%zmm" 1 } } */
-/* { dg-final { scan-assembler-not "vzeroupper" { target { ! ia32 } } } } */
-/* { dg-final { scan-assembler "vzeroupper" { target ia32 } } } */
+/* { dg-final { scan-assembler "vzeroupper" } } */
/* No need to dynamically realign the stack here. */
/* { dg-final { scan-assembler-not "and\[^\n\r]*%\[re\]sp" } } */
/* Nor use a frame pointer. */
diff --git a/gcc/testsuite/gcc.target/i386/pieces-memset-3.c b/gcc/testsuite/gcc.target/i386/pieces-memset-3.c
index 2aed6dbc68e..765441a7c4a 100644
--- a/gcc/testsuite/gcc.target/i386/pieces-memset-3.c
+++ b/gcc/testsuite/gcc.target/i386/pieces-memset-3.c
@@ -13,6 +13,6 @@ foo (int x)
/* { dg-final { scan-assembler-times "vinserti64x4\[ \\t\]+\[^\n\]*%zmm" 1 } } */
/* { dg-final { scan-assembler-times "vmovdqu64\[ \\t\]+\[^\n\]*%zmm" 1 } } */
/* No need to dynamically realign the stack here. */
-/* { dg-final { scan-assembler-not "and\[^\n\r]*%\[re\]sp" } } */
+/* { dg-final { scan-assembler-not "and\[^\n\r]*%\[re\]sp" { xfail *-*-* } } } */
/* Nor use a frame pointer. */
-/* { dg-final { scan-assembler-not "%\[re\]bp" { target { ! ia32 } } } } */
+/* { dg-final { scan-assembler-not "%\[re\]bp" { xfail *-*-* } } } */
diff --git a/gcc/testsuite/gcc.target/i386/pieces-memset-37.c b/gcc/testsuite/gcc.target/i386/pieces-memset-37.c
index fd09bd153ce..0c5056be54d 100644
--- a/gcc/testsuite/gcc.target/i386/pieces-memset-37.c
+++ b/gcc/testsuite/gcc.target/i386/pieces-memset-37.c
@@ -10,6 +10,6 @@ foo (int a1, int a2, int a3, int a4, int a5, int a6, int x, char *dst)
/* { dg-final { scan-assembler-times "vpbroadcastb\[ \\t\]+\[^\n\]*%ymm" 1 } } */
/* { dg-final { scan-assembler-times "vmovdqu\[ \\t\]+\[^\n\]*%ymm" 2 } } */
/* No need to dynamically realign the stack here. */
-/* { dg-final { scan-assembler-not "and\[^\n\r]*%\[re\]sp" } } */
+/* { dg-final { scan-assembler-not "and\[^\n\r]*%\[re\]sp" { xfail *-*-* } } } */
/* Nor use a frame pointer. */
-/* { dg-final { scan-assembler-not "%\[re\]bp" } } */
+/* { dg-final { scan-assembler-not "%\[re\]bp" { xfail *-*-* } } } */
diff --git a/gcc/testsuite/gcc.target/i386/pieces-memset-39.c b/gcc/testsuite/gcc.target/i386/pieces-memset-39.c
index 0ed88b274bd..e33644c2f10 100644
--- a/gcc/testsuite/gcc.target/i386/pieces-memset-39.c
+++ b/gcc/testsuite/gcc.target/i386/pieces-memset-39.c
@@ -11,6 +11,6 @@ foo (int a1, int a2, int a3, int a4, int a5, int a6, int x, char *dst)
/* { dg-final { scan-assembler-not "vinserti64x4" } } */
/* { dg-final { scan-assembler-times "vmovdqu8\[ \\t\]+\[^\n\]*%zmm" 1 } } */
/* No need to dynamically realign the stack here. */
-/* { dg-final { scan-assembler-not "and\[^\n\r]*%\[re\]sp" } } */
+/* { dg-final { scan-assembler-not "and\[^\n\r]*%\[re\]sp" { xfail *-*-* } } } */
/* Nor use a frame pointer. */
-/* { dg-final { scan-assembler-not "%\[re\]bp" } } */
+/* { dg-final { scan-assembler-not "%\[re\]bp" { xfail *-*-* } } } */
diff --git a/gcc/testsuite/gcc.target/i386/pieces-memset-46.c b/gcc/testsuite/gcc.target/i386/pieces-memset-46.c
index ab7894aa2e6..be1b054eed2 100644
--- a/gcc/testsuite/gcc.target/i386/pieces-memset-46.c
+++ b/gcc/testsuite/gcc.target/i386/pieces-memset-46.c
@@ -10,7 +10,7 @@ foo (void)
}
/* { dg-final { scan-assembler-times "vmovdqu8\[ \\t\]+\[^\n\]*%zmm" 1 } } */
-/* { dg-final { scan-assembler-times "vmovw\[ \\t\]+\[^\n\]*%xmm" 1 } } */
+/* { dg-final { scan-assembler-times "vmovw\[ \\t\]+\[^\n\]*%xmm" 1 { xfail *-*-* } } } */
/* No need to dynamically realign the stack here. */
/* { dg-final { scan-assembler-not "and\[^\n\r]*%\[re\]sp" } } */
/* Nor use a frame pointer. */
diff --git a/gcc/testsuite/gcc.target/i386/pieces-memset-47.c b/gcc/testsuite/gcc.target/i386/pieces-memset-47.c
index 8f2c254ad03..78d3290c74f 100644
--- a/gcc/testsuite/gcc.target/i386/pieces-memset-47.c
+++ b/gcc/testsuite/gcc.target/i386/pieces-memset-47.c
@@ -10,7 +10,7 @@ foo (void)
}
/* { dg-final { scan-assembler-times "vmovdqu(?:8|)\[ \\t\]+\[^\n\]*%xmm" 4 } } */
-/* { dg-final { scan-assembler-times "vmovw\[ \\t\]+\[^\n\]*%xmm" 1 } } */
+/* { dg-final { scan-assembler-times "vmovw\[ \\t\]+\[^\n\]*%xmm" 1 { xfail *-*-* } } } */
/* No need to dynamically realign the stack here. */
/* { dg-final { scan-assembler-not "and\[^\n\r]*%\[re\]sp" } } */
/* Nor use a frame pointer. */
diff --git a/gcc/testsuite/gcc.target/i386/pieces-memset-48.c b/gcc/testsuite/gcc.target/i386/pieces-memset-48.c
index 9a7da962183..6342dbb91b0 100644
--- a/gcc/testsuite/gcc.target/i386/pieces-memset-48.c
+++ b/gcc/testsuite/gcc.target/i386/pieces-memset-48.c
@@ -10,7 +10,7 @@ foo (void)
}
/* { dg-final { scan-assembler-times "vmovdqu(?:8|)\[ \\t\]+\[^\n\]*%ymm" 2 } } */
-/* { dg-final { scan-assembler-times "vmovw\[ \\t\]+\[^\n\]*%xmm" 1 } } */
+/* { dg-final { scan-assembler-times "vmovw\[ \\t\]+\[^\n\]*%xmm" 1 { xfail *-*-* } } } */
/* No need to dynamically realign the stack here. */
/* { dg-final { scan-assembler-not "and\[^\n\r]*%\[re\]sp" } } */
/* Nor use a frame pointer. */
diff --git a/gcc/testsuite/gcc.target/i386/pr100865-11b.c b/gcc/testsuite/gcc.target/i386/pr100865-11b.c
index 7e458e85cdd..12d55b9a642 100644
--- a/gcc/testsuite/gcc.target/i386/pr100865-11b.c
+++ b/gcc/testsuite/gcc.target/i386/pr100865-11b.c
@@ -5,4 +5,4 @@
/* { dg-final { scan-assembler-times "movabsq" 1 } } */
/* { dg-final { scan-assembler-times "vpbroadcastq\[\\t \]+%(?:r|e)\[^\n\]*, %xmm\[0-9\]+" 1 } } */
-/* { dg-final { scan-assembler-times "vmovdqa64\[\\t \]%xmm\[0-9\]+, " 16 } } */
+/* { dg-final { scan-assembler-times "vmovdqa\[\\t \]%xmm\[0-9\]+, " 16 } } */
diff --git a/gcc/testsuite/gcc.target/i386/pr100865-12b.c b/gcc/testsuite/gcc.target/i386/pr100865-12b.c
index dee0cfb016a..63a5629b90c 100644
--- a/gcc/testsuite/gcc.target/i386/pr100865-12b.c
+++ b/gcc/testsuite/gcc.target/i386/pr100865-12b.c
@@ -5,4 +5,4 @@
/* { dg-final { scan-assembler-times "movabsq" 1 } } */
/* { dg-final { scan-assembler-times "vpbroadcastq\[\\t \]+%(?:r|e)\[^\n\]*, %xmm\[0-9\]+" 1 } } */
-/* { dg-final { scan-assembler-times "vmovdqa64\[\\t \]%xmm\[0-9\]+, " 16 } } */
+/* { dg-final { scan-assembler-times "vmovdqa\[\\t \]%xmm\[0-9\]+, " 16 } } */
diff --git a/gcc/testsuite/gcc.target/i386/pr100865-8a.c b/gcc/testsuite/gcc.target/i386/pr100865-8a.c
index 544a14db6f7..911b14d4a25 100644
--- a/gcc/testsuite/gcc.target/i386/pr100865-8a.c
+++ b/gcc/testsuite/gcc.target/i386/pr100865-8a.c
@@ -20,5 +20,5 @@ foo (void)
array[i] = MK_CONST128_BROADCAST_SIGNED (-45);
}
-/* { dg-final { scan-assembler-times "(?:vpbroadcastd|vpshufd)\[\\t \]+\[^\n\]*, %xmm\[0-9\]+" 1 } } */
+/* { dg-final { scan-assembler-times "(?:vpbroadcastd|vpshufd)\[\\t \]+\[^\n\]*, %xmm\[0-9\]+" 1 { xfail *-*-* } } } */
/* { dg-final { scan-assembler-times "vmovdqa\[\\t \]%xmm\[0-9\]+, " 16 } } */
diff --git a/gcc/testsuite/gcc.target/i386/pr100865-8b.c b/gcc/testsuite/gcc.target/i386/pr100865-8b.c
index 4b7dd7cee3e..99a10ad83bd 100644
--- a/gcc/testsuite/gcc.target/i386/pr100865-8b.c
+++ b/gcc/testsuite/gcc.target/i386/pr100865-8b.c
@@ -4,4 +4,4 @@
#include "pr100865-8a.c"
/* { dg-final { scan-assembler-times "vpbroadcastd\[\\t \]+%(?:r|e)\[^\n\]*, %xmm\[0-9\]+" 1 } } */
-/* { dg-final { scan-assembler-times "vmovdqa64\[\\t \]%xmm\[0-9\]+, " 16 } } */
+/* { dg-final { scan-assembler-times "vmovdqa\[\\t \]%xmm\[0-9\]+, " 16 } } */
diff --git a/gcc/testsuite/gcc.target/i386/pr100865-8c.c b/gcc/testsuite/gcc.target/i386/pr100865-8c.c
index efee0488614..00682edb8c9 100644
--- a/gcc/testsuite/gcc.target/i386/pr100865-8c.c
+++ b/gcc/testsuite/gcc.target/i386/pr100865-8c.c
@@ -3,5 +3,5 @@
#include "pr100865-8a.c"
-/* { dg-final { scan-assembler-times "vpshufd\[\\t \]+\[^\n\]*, %xmm\[0-9\]+" 1 } } */
+/* { dg-final { scan-assembler-times "vpshufd\[\\t \]+\[^\n\]*, %xmm\[0-9\]+" 1 { xfail *-*-* } } } */
/* { dg-final { scan-assembler-times "vmovdqa\[\\t \]%xmm\[0-9\]+, " 16 } } */
diff --git a/gcc/testsuite/gcc.target/i386/pr100865-9b.c b/gcc/testsuite/gcc.target/i386/pr100865-9b.c
index a315dde7c52..14696248525 100644
--- a/gcc/testsuite/gcc.target/i386/pr100865-9b.c
+++ b/gcc/testsuite/gcc.target/i386/pr100865-9b.c
@@ -4,4 +4,4 @@
#include "pr100865-9a.c"
/* { dg-final { scan-assembler-times "vpbroadcastw\[\\t \]+%(?:r|e)\[^\n\]*, %xmm\[0-9\]+" 1 } } */
-/* { dg-final { scan-assembler-times "vmovdqa64\[\\t \]%xmm\[0-9\]+, " 16 } } */
+/* { dg-final { scan-assembler-times "vmovdqa\[\\t \]%xmm\[0-9\]+, " 16 } } */
diff --git a/gcc/testsuite/gcc.target/i386/pr100865-9c.c b/gcc/testsuite/gcc.target/i386/pr100865-9c.c
index e6f25902c1d..8ffcdc1629d 100644
--- a/gcc/testsuite/gcc.target/i386/pr100865-9c.c
+++ b/gcc/testsuite/gcc.target/i386/pr100865-9c.c
@@ -3,5 +3,5 @@
#include "pr100865-9a.c"
-/* { dg-final { scan-assembler-times "vpshufd\[\\t \]+\[^\n\]*, %xmm\[0-9\]+" 1 } } */
+/* { dg-final { scan-assembler-times "vpshufd\[\\t \]+\[^\n\]*, %xmm\[0-9\]+" 1 { xfail *-*-* } } } */
/* { dg-final { scan-assembler-times "vmovdqa\[\\t \]%xmm\[0-9\]+, " 16 } } */
diff --git a/gcc/testsuite/gcc.target/i386/pr104704-1.c b/gcc/testsuite/gcc.target/i386/pr104704-1.c
new file mode 100644
index 00000000000..28c499f4c44
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr104704-1.c
@@ -0,0 +1,33 @@
+/* { dg-do run { target { ! ia32 } } } */
+/* { dg-options "-O2 -march=x86-64 -mavx512f" } */
+
+#include <immintrin.h>
+
+__m512d y, z;
+
+int i;
+
+__attribute__((noipa))
+int
+do_test (void)
+{
+ register int xmm31 __asm ("xmm31") = i;
+ asm volatile ("" : "+v" (xmm31));
+ z = y;
+ register int xmm2 __asm ("xmm2") = xmm31;
+ asm volatile ("" : "+v" (xmm2));
+ return xmm2;
+}
+
+__attribute__((target("arch=x86-64")))
+int
+main (void)
+{
+ if (__builtin_cpu_supports ("avx512f"))
+ {
+ i = 4;
+ if (do_test () != 4)
+ __builtin_abort ();
+ }
+ return 0;
+}
diff --git a/gcc/testsuite/gcc.target/i386/pr104704-2.c b/gcc/testsuite/gcc.target/i386/pr104704-2.c
new file mode 100644
index 00000000000..79b04b2543a
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr104704-2.c
@@ -0,0 +1,33 @@
+/* { dg-do run { target { ! ia32 } } } */
+/* { dg-options "-O2 -march=x86-64 -mavx2" } */
+
+#include <immintrin.h>
+
+__m256d y, z;
+
+int i;
+
+__attribute__((noipa))
+int
+do_test (void)
+{
+ register int xmm15 __asm ("xmm15") = i;
+ asm volatile ("" : "+v" (xmm15));
+ z = y;
+ register int xmm2 __asm ("xmm2") = xmm15;
+ asm volatile ("" : "+v" (xmm2));
+ return xmm2;
+}
+
+__attribute__((target("arch=x86-64")))
+int
+main (void)
+{
+ if (__builtin_cpu_supports ("avx2"))
+ {
+ i = 4;
+ if (do_test () != 4)
+ __builtin_abort ();
+ }
+ return 0;
+}
diff --git a/gcc/testsuite/gcc.target/i386/pr104704-3.c b/gcc/testsuite/gcc.target/i386/pr104704-3.c
new file mode 100644
index 00000000000..d0648d82fbd
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr104704-3.c
@@ -0,0 +1,33 @@
+/* { dg-do run { target ia32 } } */
+/* { dg-options "-O2 -march=i686 -msse2" } */
+
+#include <immintrin.h>
+
+__m128d y, z;
+
+int i;
+
+__attribute__((noipa))
+int
+do_test (void)
+{
+ register int xmm7 __asm ("xmm7") = i;
+ asm volatile ("" : "+v" (xmm7));
+ z = y;
+ register int xmm2 __asm ("xmm2") = xmm7;
+ asm volatile ("" : "+v" (xmm2));
+ return xmm2;
+}
+
+__attribute__((target("arch=i486")))
+int
+main (void)
+{
+ if (__builtin_cpu_supports ("sse2"))
+ {
+ i = 4;
+ if (do_test () != 4)
+ __builtin_abort ();
+ }
+ return 0;
+}
diff --git a/gcc/testsuite/gcc.target/i386/pr104704-4.c b/gcc/testsuite/gcc.target/i386/pr104704-4.c
new file mode 100644
index 00000000000..c97666293b7
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr104704-4.c
@@ -0,0 +1,33 @@
+/* { dg-do run { target { ! ia32 } } } */
+/* { dg-options "-O2 -march=x86-64 -mavx512f" } */
+
+#include <immintrin.h>
+
+char z[128];
+
+int i;
+
+__attribute__((noipa))
+int
+do_test (void)
+{
+ register int xmm31 __asm ("xmm31") = i;
+ asm volatile ("" : "+v" (xmm31));
+ __builtin_memset (&z, 0, sizeof (z));
+ register int xmm2 __asm ("xmm2") = xmm31;
+ asm volatile ("" : "+v" (xmm2));
+ return xmm2;
+}
+
+__attribute__((target("arch=x86-64")))
+int
+main (void)
+{
+ if (__builtin_cpu_supports ("avx512f"))
+ {
+ i = 4;
+ if (do_test () != 4)
+ __builtin_abort ();
+ }
+ return 0;
+}
diff --git a/gcc/testsuite/gcc.target/i386/pr104704-5.c b/gcc/testsuite/gcc.target/i386/pr104704-5.c
new file mode 100644
index 00000000000..de9466e697d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr104704-5.c
@@ -0,0 +1,33 @@
+/* { dg-do run { target { ! ia32 } } } */
+/* { dg-options "-O2 -march=x86-64 -mtune=skylake -mavx2" } */
+
+#include <immintrin.h>
+
+char z[64];
+
+int i;
+
+__attribute__((noipa))
+int
+do_test (void)
+{
+ register int xmm15 __asm ("xmm15") = i;
+ asm volatile ("" : "+v" (xmm15));
+ __builtin_memset (&z, 0, sizeof (z));
+ register int xmm2 __asm ("xmm2") = xmm15;
+ asm volatile ("" : "+v" (xmm2));
+ return xmm2;
+}
+
+__attribute__((target("arch=x86-64")))
+int
+main (void)
+{
+ if (__builtin_cpu_supports ("avx2"))
+ {
+ i = 4;
+ if (do_test () != 4)
+ __builtin_abort ();
+ }
+ return 0;
+}
diff --git a/gcc/testsuite/gcc.target/i386/pr104704-6.c b/gcc/testsuite/gcc.target/i386/pr104704-6.c
new file mode 100644
index 00000000000..e6a4cb840ee
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr104704-6.c
@@ -0,0 +1,33 @@
+/* { dg-do run { target ia32 } } */
+/* { dg-options "-O2 -march=i686 -mtune=skylake -msse2" } */
+
+#include <immintrin.h>
+
+char z[16];
+
+int i;
+
+__attribute__((noipa))
+int
+do_test (void)
+{
+ register int xmm7 __asm ("xmm7") = i;
+ asm volatile ("" : "+v" (xmm7));
+ __builtin_memset (&z, 0, sizeof (z));
+ register int xmm2 __asm ("xmm2") = xmm7;
+ asm volatile ("" : "+v" (xmm2));
+ return xmm2;
+}
+
+__attribute__((target("arch=i486")))
+int
+main (void)
+{
+ if (__builtin_cpu_supports ("sse2"))
+ {
+ i = 4;
+ if (do_test () != 4)
+ __builtin_abort ();
+ }
+ return 0;
+}
diff --git a/gcc/testsuite/gcc.target/i386/pr82941-1.c b/gcc/testsuite/gcc.target/i386/pr82941-1.c
index c3be2f5b797..d7e530d5116 100644
--- a/gcc/testsuite/gcc.target/i386/pr82941-1.c
+++ b/gcc/testsuite/gcc.target/i386/pr82941-1.c
@@ -11,5 +11,4 @@ pr82941 ()
z = y;
}
-/* { dg-final { scan-assembler-times "vzeroupper" 1 { target ia32 } } } */
-/* { dg-final { scan-assembler-not "vzeroupper" { target { ! ia32 } } } } */
+/* { dg-final { scan-assembler-times "vzeroupper" 1 } } */
diff --git a/gcc/testsuite/gcc.target/i386/pr82942-1.c b/gcc/testsuite/gcc.target/i386/pr82942-1.c
index 29ead049a67..9cdf81a9d60 100644
--- a/gcc/testsuite/gcc.target/i386/pr82942-1.c
+++ b/gcc/testsuite/gcc.target/i386/pr82942-1.c
@@ -3,5 +3,4 @@
#include "pr82941-1.c"
-/* { dg-final { scan-assembler-times "vzeroupper" 1 { target ia32 } } } */
-/* { dg-final { scan-assembler-not "vzeroupper" { target { ! ia32 } } } } */
+/* { dg-final { scan-assembler-times "vzeroupper" 1 } } */
diff --git a/gcc/testsuite/gcc.target/i386/pr82990-1.c b/gcc/testsuite/gcc.target/i386/pr82990-1.c
index bbf580fea77..ff1d6d40eb2 100644
--- a/gcc/testsuite/gcc.target/i386/pr82990-1.c
+++ b/gcc/testsuite/gcc.target/i386/pr82990-1.c
@@ -11,5 +11,4 @@ pr82941 ()
z = y;
}
-/* { dg-final { scan-assembler-times "vzeroupper" 1 { target ia32 } } } */
-/* { dg-final { scan-assembler-not "vzeroupper" { target { ! ia32 } } } } */
+/* { dg-final { scan-assembler-times "vzeroupper" 1 } } */
diff --git a/gcc/testsuite/gcc.target/i386/pr82990-3.c b/gcc/testsuite/gcc.target/i386/pr82990-3.c
index 89ddb20adb3..201fa98d8d4 100644
--- a/gcc/testsuite/gcc.target/i386/pr82990-3.c
+++ b/gcc/testsuite/gcc.target/i386/pr82990-3.c
@@ -3,5 +3,4 @@
#include "pr82941-1.c"
-/* { dg-final { scan-assembler-times "vzeroupper" 1 { target ia32 } } } */
-/* { dg-final { scan-assembler-not "vzeroupper" { target { ! ia32 } } } } */
+/* { dg-final { scan-assembler-times "vzeroupper" 1 } } */
diff --git a/gcc/testsuite/gcc.target/i386/pr82990-5.c b/gcc/testsuite/gcc.target/i386/pr82990-5.c
index b9da0e706b1..9932bdc5375 100644
--- a/gcc/testsuite/gcc.target/i386/pr82990-5.c
+++ b/gcc/testsuite/gcc.target/i386/pr82990-5.c
@@ -11,5 +11,4 @@ pr82941 ()
z = y;
}
-/* { dg-final { scan-assembler-times "vzeroupper" 1 { target ia32 } } } */
-/* { dg-final { scan-assembler-not "vzeroupper" { target { ! ia32 } } } } */
+/* { dg-final { scan-assembler-times "vzeroupper" 1 } } */
diff --git a/gcc/testsuite/gcc.target/i386/pr90773-14.c b/gcc/testsuite/gcc.target/i386/pr90773-14.c
index 96ee5cb08c1..60763bb7c37 100644
--- a/gcc/testsuite/gcc.target/i386/pr90773-14.c
+++ b/gcc/testsuite/gcc.target/i386/pr90773-14.c
@@ -10,4 +10,4 @@ foo (void)
}
/* { dg-final { scan-assembler-times "movups\[\\t \]+%xmm\[0-9\]+, \\(%\[\^,\]+\\)" 1 } } */
-/* { dg-final { scan-assembler-times "movd\[\\t \]+%xmm\[0-9\]+, 16\\(%\[\^,\]+\\)" 1 } } */
+/* { dg-final { scan-assembler-times "movd\[\\t \]+%xmm\[0-9\]+, 16\\(%\[\^,\]+\\)" 1 { xfail *-*-* } } } */
diff --git a/gcc/testsuite/gcc.target/i386/pr90773-17.c b/gcc/testsuite/gcc.target/i386/pr90773-17.c
index 73d5d5abaee..570748366f8 100644
--- a/gcc/testsuite/gcc.target/i386/pr90773-17.c
+++ b/gcc/testsuite/gcc.target/i386/pr90773-17.c
@@ -11,4 +11,4 @@ foo (void)
/* { dg-final { scan-assembler-times "vpbroadcastb" 1 } } */
/* { dg-final { scan-assembler-times "vmovdqu8\[\\t \]+%xmm\[0-9\]+, \\(%\[\^,\]+\\)" 1 } } */
-/* { dg-final { scan-assembler-times "vmovd\[\\t \]+%xmm\[0-9\]+, 15\\(%\[\^,\]+\\)" 1 } } */
+/* { dg-final { scan-assembler-times "vmovd\[\\t \]+%xmm\[0-9\]+, 16\\(%\[\^,\]+\\)" 1 { xfail *-*-* } } } */
diff --git a/gcc/testsuite/gcc.target/i386/pr90773-5.c b/gcc/testsuite/gcc.target/i386/pr90773-5.c
index 27185a236a7..9ef96279960 100644
--- a/gcc/testsuite/gcc.target/i386/pr90773-5.c
+++ b/gcc/testsuite/gcc.target/i386/pr90773-5.c
@@ -10,4 +10,4 @@ foo (void)
}
/* { dg-final { scan-assembler-times "movups\[\\t \]+%xmm\[0-9\]+, \\(%\[\^,\]+\\)" 1 } } */
-/* { dg-final { scan-assembler-times "movq\[\\t \]+%xmm\[0-9\]+, 13\\(%\[\^,\]+\\)" 1 } } */
+/* { dg-final { scan-assembler-times "movq\[\\t \]+%xmm\[0-9\]+, 13\\(%\[\^,\]+\\)" 1 { xfail *-*-* } } } */
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2022-03-04 3:02 [gcc r12-7472] x86: Always return pseudo register in ix86_gen_scratch_sse_rtx H.J. Lu
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