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* [gcc r12-7647] Fix libitm.c/memset-1.c test fails with new peephole2s.
@ 2022-03-14 18:14 Roger Sayle
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From: Roger Sayle @ 2022-03-14 18:14 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:6abc4e46f8c240aaab286414cdfb6d1e5eb9128a
commit r12-7647-g6abc4e46f8c240aaab286414cdfb6d1e5eb9128a
Author: Roger Sayle <roger@nextmovesoftware.com>
Date: Mon Mar 14 18:12:55 2022 +0000
Fix libitm.c/memset-1.c test fails with new peephole2s.
My sincere apologies for the breakage, but alas handling SImode in the
recently added "xorl;movb -> movzbl" peephole2 turns out to be slightly
more complicated that just using SWI48 as a mode iterator. I'd failed
to check the machine description carefully, but the *zero_extend<mode>si2
define_insn is conditionally defined, based on x86 target tuning using
TARGET_ZERO_EXTEND_WITH_AND, and therefore unavailable on 486 and pentium
unless optimizing the code for size. It turns out that the libitm testsuite
specifies -m486 with make check RUNTESTFLAGS="--target_board='unix{-m32}'"
and therefore encounters/catches oversight.
Fixed by adding the appropriate conditions to the new peephole2 patterns.
2022-03-14 Roger Sayle <roger@nextmovesoftware.com>
Uroš Bizjak <ubizjak@gmail.com>
gcc/ChangeLog
* config/i386/i386.md (peephole2 xorl;movb -> movzbl): Disable
transformation when *zero_extend<mode>si2 is not available.
gcc/testsuite/ChangeLog
* gcc.target/i386/pr98335.c: Skip this test if tuning for i486
or pentium, and not optimizing for size.
Diff:
---
gcc/config/i386/i386.md | 10 ++++++++--
gcc/testsuite/gcc.target/i386/pr98335.c | 5 +++++
2 files changed, 13 insertions(+), 2 deletions(-)
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index c8fbf605e41..46a266322d3 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -4316,7 +4316,10 @@
(clobber (reg:CC FLAGS_REG))])
(set (strict_low_part (match_operand:SWI12 1 "general_reg_operand"))
(match_operand:SWI12 2 "nonimmediate_operand"))]
- "REGNO (operands[0]) == REGNO (operands[1])"
+ "REGNO (operands[0]) == REGNO (operands[1])
+ && (<SWI48:MODE>mode != SImode
+ || !TARGET_ZERO_EXTEND_WITH_AND
+ || !optimize_function_for_speed_p (cfun))"
[(set (match_dup 0) (zero_extend:SWI48 (match_dup 2)))])
;; Likewise, but preserving FLAGS_REG.
@@ -4324,7 +4327,10 @@
[(set (match_operand:SWI48 0 "general_reg_operand") (const_int 0))
(set (strict_low_part (match_operand:SWI12 1 "general_reg_operand"))
(match_operand:SWI12 2 "nonimmediate_operand"))]
- "REGNO (operands[0]) == REGNO (operands[1])"
+ "REGNO (operands[0]) == REGNO (operands[1])
+ && (<SWI48:MODE>mode != SImode
+ || !TARGET_ZERO_EXTEND_WITH_AND
+ || !optimize_function_for_speed_p (cfun))"
[(set (match_dup 0) (zero_extend:SWI48 (match_dup 2)))])
\f
;; Sign extension instructions
diff --git a/gcc/testsuite/gcc.target/i386/pr98335.c b/gcc/testsuite/gcc.target/i386/pr98335.c
index 7fa7ad70dce..bf731b4e387 100644
--- a/gcc/testsuite/gcc.target/i386/pr98335.c
+++ b/gcc/testsuite/gcc.target/i386/pr98335.c
@@ -1,5 +1,10 @@
/* { dg-do compile } */
/* { dg-options "-O2" } */
+/* { dg-skip-if "" { *-*-* } { "-march=i[45]86" } { "-O[sz]" } } */
+/* { dg-skip-if "" { *-*-* } { "-march=pentium" } { "-O[sz]" } } */
+/* { dg-skip-if "" { *-*-* } { "-mtune=i[45]86" } { "-O[sz]" } } */
+/* { dg-skip-if "" { *-*-* } { "-mtune=pentium" } { "-O[sz]" } } */
+
union Data { char a; short b; };
char c;
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