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From: Michael Meissner <meissner@gcc.gnu.org>
To: gcc-cvs@gcc.gnu.org
Subject: [gcc(refs/users/meissner/heads/work084)] Revert patch.
Date: Tue, 29 Mar 2022 02:58:38 +0000 (GMT)	[thread overview]
Message-ID: <20220329025838.21D443858C51@sourceware.org> (raw)

https://gcc.gnu.org/g:3a929c2d268d2b9803eca3b396f638182d178076

commit 3a929c2d268d2b9803eca3b396f638182d178076
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Mon Mar 28 22:57:56 2022 -0400

    Revert patch.
    
    gcc/
            PR target/99293
            Revert patch.
            * config/rs6000/rs6000-p8swap.cc (rtx_is_swappable_p): Remove
            UNSPEC_VSX_XXSPLTD case.
            * config/rs6000/vsx.md (UNSPEC_VSX_XXSPLTD): Delete.
            (vsx_xxspltd_<mode>): Rewrite to use VEC_DUPLICATE.
    
    gcc/testsuite:
            PR target/99293
            Revert patch.
            * gcc.target/powerpc/pr99293.c: New test.

Diff:
---
 gcc/config/rs6000/rs6000-p8swap.cc         |  1 +
 gcc/config/rs6000/vsx.md                   | 38 +++++++-----------------------
 gcc/testsuite/gcc.target/powerpc/pr99293.c | 36 ----------------------------
 3 files changed, 10 insertions(+), 65 deletions(-)

diff --git a/gcc/config/rs6000/rs6000-p8swap.cc b/gcc/config/rs6000/rs6000-p8swap.cc
index 1973d9c8245..d301bc3fe59 100644
--- a/gcc/config/rs6000/rs6000-p8swap.cc
+++ b/gcc/config/rs6000/rs6000-p8swap.cc
@@ -805,6 +805,7 @@ rtx_is_swappable_p (rtx op, unsigned int *special)
 	  case UNSPEC_VUPKLU_V4SF:
 	    return 0;
 	  case UNSPEC_VSPLT_DIRECT:
+	  case UNSPEC_VSX_XXSPLTD:
 	    *special = SH_SPLAT;
 	    return 1;
 	  case UNSPEC_REDUC_PLUS:
diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md
index 0ab24186812..15bd86dfdfb 100644
--- a/gcc/config/rs6000/vsx.md
+++ b/gcc/config/rs6000/vsx.md
@@ -296,6 +296,7 @@
    UNSPEC_VSX_XXPERM
 
    UNSPEC_VSX_XXSPLTW
+   UNSPEC_VSX_XXSPLTD
    UNSPEC_VSX_DIVSD
    UNSPEC_VSX_DIVUD
    UNSPEC_VSX_DIVSQ
@@ -3088,25 +3089,6 @@
 }
   [(set_attr "type" "vecperm")])
 
-;; Combiner patterns to allow creating XXPERMDI's to access either double
-;; word element in a vector register when used with VEC_DUPLICATE..
-(define_insn "*vsx_dup_<mode>_1"
-  [(set (match_operand:VSX_D 0 "vsx_register_operand" "=wa")
-	(vec_duplicate:VSX_D
-	 (vec_select:<VS_scalar>
-	  (match_operand:VSX_D 1 "gpc_reg_operand" "wa")
-	  (parallel [(match_operand:QI 2 "const_0_to_1_operand" "n")]))))]
-  "VECTOR_MEM_VSX_P (<MODE>mode)"
-{
-  HOST_WIDE_INT dword = INTVAL (operands[2]);
-  if (!BYTES_BIG_ENDIAN)
-    dword = !dword;
-
-  operands[3] = GEN_INT (3*dword);
-  return "xxpermdi %x0,%x1,%x1,%3";
-}
-  [(set_attr "type" "vecperm")])
-
 ;; Special purpose concat using xxpermdi to glue two single precision values
 ;; together, relying on the fact that internally scalar floats are represented
 ;; as doubles.  This is used to initialize a V4SF vector with 4 floats
@@ -4694,18 +4676,16 @@
 ;; V2DF/V2DI splat for use by vec_splat builtin
 (define_insn "vsx_xxspltd_<mode>"
   [(set (match_operand:VSX_D 0 "vsx_register_operand" "=wa")
-	(vec_duplicate:VSX_D
-	 (vec_select:<VS_scalar>
-	  (match_operand:VSX_D 1 "gpc_reg_operand" "wa")
-	  (parallel [(match_operand:QI 2 "const_0_to_1_operand" "i")]))))]
+        (unspec:VSX_D [(match_operand:VSX_D 1 "vsx_register_operand" "wa")
+	               (match_operand:QI 2 "u5bit_cint_operand" "i")]
+                      UNSPEC_VSX_XXSPLTD))]
   "VECTOR_MEM_VSX_P (<MODE>mode)"
 {
-  HOST_WIDE_INT dword = INTVAL (operands[2]);
-  if (!BYTES_BIG_ENDIAN)
-    dword = !dword;
-
-  operands[3] = GEN_INT (3*dword);
-  return "xxpermdi %x0,%x1,%x1,%3";
+  if ((BYTES_BIG_ENDIAN && INTVAL (operands[2]) == 0)
+      || (!BYTES_BIG_ENDIAN && INTVAL (operands[2]) == 1))
+    return "xxpermdi %x0,%x1,%x1,0";
+  else
+    return "xxpermdi %x0,%x1,%x1,3";
 }
   [(set_attr "type" "vecperm")])
 
diff --git a/gcc/testsuite/gcc.target/powerpc/pr99293.c b/gcc/testsuite/gcc.target/powerpc/pr99293.c
deleted file mode 100644
index 03c22f8f4de..00000000000
--- a/gcc/testsuite/gcc.target/powerpc/pr99293.c
+++ /dev/null
@@ -1,36 +0,0 @@
-/* { dg-do compile } */
-/* { dg-require-effective-target powerpc_vsx_ok } */
-/* { dg-options "-O2 -mvsx" } */
-
-/* Test for PR 99263, which wants to do:
-   __builtin_vec_splats (__builtin_vec_extract (v, n))
-
-   where v is a V2DF or V2DI vector and n is either 0 or 1.  Previously the
-   compiler would do a direct move to the GPR registers to select the item and
-   a direct move from the GPR registers to do the splat.  */
-
-vector long long
-splat_dup_ll_0 (vector long long v)
-{
-  return __builtin_vec_splats (__builtin_vec_extract (v, 0));
-}
-	
-vector long long
-splat_dup_ll_1 (vector long long v)
-{
-  return __builtin_vec_splats (__builtin_vec_extract (v, 1));
-}
-
-vector double
-splat_dup_d_0 (vector double v)
-{
-  return __builtin_vec_splats (__builtin_vec_extract (v, 0));
-}
-	
-vector double
-splat_dup_d_1 (vector double v)
-{
-  return __builtin_vec_splats (__builtin_vec_extract (v, 1));
-}
-	
-/* { dg-final { scan-assembler-times {\mxxpermdi\M} 4 } } */


             reply	other threads:[~2022-03-29  2:58 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-03-29  2:58 Michael Meissner [this message]
2022-03-29 23:29 Michael Meissner
2022-03-29 23:35 Michael Meissner
2022-03-30 17:57 Michael Meissner
2022-03-31 14:00 Michael Meissner
2022-03-31 14:00 Michael Meissner
2022-03-31 14:00 Michael Meissner
2022-03-31 14:00 Michael Meissner
2022-04-01 20:15 Michael Meissner
2022-04-02  0:03 Michael Meissner
2022-04-02  2:24 Michael Meissner

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