public inbox for gcc-cvs@sourceware.org
help / color / mirror / Atom feed
* [gcc r12-7962] mips: Ignore zero width fields in arguments and issue -Wpsabi warning about C zero-width field ABI c
@ 2022-04-01 14:39 Xi Ruoyao
0 siblings, 0 replies; only message in thread
From: Xi Ruoyao @ 2022-04-01 14:39 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:413187b0b3c873333253838e4afbf8463b288b59
commit r12-7962-g413187b0b3c873333253838e4afbf8463b288b59
Author: Xi Ruoyao <xry111@mengyan1223.wang>
Date: Thu Mar 31 23:40:23 2022 +0800
mips: Ignore zero width fields in arguments and issue -Wpsabi warning about C zero-width field ABI changes [PR102024]
gcc/
PR target/102024
* config/mips/mips.cc (mips_function_arg): Ignore zero-width
fields, and inform if it causes a psABI change.
gcc/testsuite/
PR target/102024
* gcc.target/mips/pr102024-1.c: New test.
* gcc.target/mips/pr102024-2.c: New test.
* gcc.target/mips/pr102024-3.c: New test.
Diff:
---
gcc/config/mips/mips.cc | 46 +++++++++++++++++++++++++++---
gcc/testsuite/gcc.target/mips/pr102024-1.c | 20 +++++++++++++
gcc/testsuite/gcc.target/mips/pr102024-2.c | 20 +++++++++++++
gcc/testsuite/gcc.target/mips/pr102024-3.c | 20 +++++++++++++
4 files changed, 102 insertions(+), 4 deletions(-)
diff --git a/gcc/config/mips/mips.cc b/gcc/config/mips/mips.cc
index 83860b5d4b7..7681983186c 100644
--- a/gcc/config/mips/mips.cc
+++ b/gcc/config/mips/mips.cc
@@ -6042,11 +6042,27 @@ mips_function_arg (cumulative_args_t cum_v, const function_arg_info &arg)
for (i = 0; i < info.reg_words; i++)
{
rtx reg;
+ bool zero_width_field_abi_change = false;
for (; field; field = DECL_CHAIN (field))
- if (TREE_CODE (field) == FIELD_DECL
- && int_bit_position (field) >= bitpos)
- break;
+ {
+ if (TREE_CODE (field) != FIELD_DECL)
+ continue;
+
+ /* Ignore zero-width fields. And, if the ignored
+ field is not a C++ zero-width bit-field, it may be
+ an ABI change. */
+ if (DECL_FIELD_CXX_ZERO_WIDTH_BIT_FIELD (field))
+ continue;
+ if (integer_zerop (DECL_SIZE (field)))
+ {
+ zero_width_field_abi_change = true;
+ continue;
+ }
+
+ if (int_bit_position (field) >= bitpos)
+ break;
+ }
if (field
&& int_bit_position (field) == bitpos
@@ -6054,7 +6070,29 @@ mips_function_arg (cumulative_args_t cum_v, const function_arg_info &arg)
&& TYPE_PRECISION (TREE_TYPE (field)) == BITS_PER_WORD)
reg = gen_rtx_REG (DFmode, FP_ARG_FIRST + info.reg_offset + i);
else
- reg = gen_rtx_REG (DImode, GP_ARG_FIRST + info.reg_offset + i);
+ {
+ reg = gen_rtx_REG (DImode,
+ GP_ARG_FIRST + info.reg_offset + i);
+ zero_width_field_abi_change = false;
+ }
+
+ if (zero_width_field_abi_change && warn_psabi)
+ {
+ static unsigned last_reported_type_uid;
+ unsigned uid = TYPE_UID (TYPE_MAIN_VARIANT (arg.type));
+ if (uid != last_reported_type_uid)
+ {
+ static const char *url
+ = CHANGES_ROOT_URL
+ "gcc-12/changes.html#mips_zero_width_fields";
+ inform (input_location,
+ "the ABI for passing a value containing "
+ "zero-width fields before an adjacent "
+ "64-bit floating-point field was changed "
+ "in GCC %{12.1%}", url);
+ last_reported_type_uid = uid;
+ }
+ }
XVECEXP (ret, 0, i)
= gen_rtx_EXPR_LIST (VOIDmode, reg,
diff --git a/gcc/testsuite/gcc.target/mips/pr102024-1.c b/gcc/testsuite/gcc.target/mips/pr102024-1.c
new file mode 100644
index 00000000000..cf442863fc2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/pr102024-1.c
@@ -0,0 +1,20 @@
+// PR target/102024
+// { dg-do compile }
+// { dg-options "-mabi=64 -mhard-float" }
+// { dg-final { scan-assembler "\\\$f12" } }
+
+struct foo
+{
+ int : 0;
+ double a;
+};
+
+extern void func(struct foo);
+
+void
+pass_foo(void)
+{
+ struct foo test;
+ test.a = 114;
+ func(test); // { dg-message "the ABI for passing a value containing zero-width fields before an adjacent 64-bit floating-point field was changed in GCC 12.1" }
+}
diff --git a/gcc/testsuite/gcc.target/mips/pr102024-2.c b/gcc/testsuite/gcc.target/mips/pr102024-2.c
new file mode 100644
index 00000000000..89b26f86038
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/pr102024-2.c
@@ -0,0 +1,20 @@
+// PR target/102024
+// { dg-do compile }
+// { dg-options "-mabi=64 -mhard-float" }
+// { dg-final { scan-assembler "\\\$f12" } }
+
+struct foo
+{
+ char empty[0];
+ double a;
+};
+
+extern void func(struct foo);
+
+void
+pass_foo(void)
+{
+ struct foo test;
+ test.a = 114;
+ func(test); // { dg-message "the ABI for passing a value containing zero-width fields before an adjacent 64-bit floating-point field was changed in GCC 12.1" }
+}
diff --git a/gcc/testsuite/gcc.target/mips/pr102024-3.c b/gcc/testsuite/gcc.target/mips/pr102024-3.c
new file mode 100644
index 00000000000..477f07055a1
--- /dev/null
+++ b/gcc/testsuite/gcc.target/mips/pr102024-3.c
@@ -0,0 +1,20 @@
+// PR target/102024
+// { dg-do compile }
+// { dg-options "-mabi=64 -mhard-float" }
+// { dg-final { scan-assembler "\\\$f12" } }
+
+struct foo
+{
+ struct {} empty;
+ double a;
+};
+
+extern void func(struct foo);
+
+void
+pass_foo(void)
+{
+ struct foo test;
+ test.a = 114;
+ func(test); // { dg-message "the ABI for passing a value containing zero-width fields before an adjacent 64-bit floating-point field was changed in GCC 12.1" }
+}
^ permalink raw reply [flat|nested] only message in thread
only message in thread, other threads:[~2022-04-01 14:39 UTC | newest]
Thread overview: (only message) (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-04-01 14:39 [gcc r12-7962] mips: Ignore zero width fields in arguments and issue -Wpsabi warning about C zero-width field ABI c Xi Ruoyao
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).