[gcc(refs/vendors/ARM/heads/morello)] ifcvt: Check that MEMs have the same mode

[gcc(refs/vendors/ARM/heads/morello)] ifcvt: Check that MEMs have the same mode

[Matthew Malcomson]

https://gcc.gnu.org/g:89f05d65c693b02ac7754c3d6e3bb29f96ccde82

commit 89f05d65c693b02ac7754c3d6e3bb29f96ccde82
Author: Richard Sandiford <richard.sandiford@arm.com>
Date:   Wed Apr 27 13:12:55 2022 +0100

    ifcvt: Check that MEMs have the same mode
    
    If ifcvt seems something like:
    
       if cond:
         ...
         (set (reg R) (mem A1))
       else:
         ...
         (set (reg R) (mem A2))
    
    it tries to create an rtl equivalent of cond ? A1 : A2 for
    the MEM address.  The optimisation was missing a check for
    whether the MEMs had the same mode, so it could fire if
    A1 was a capability and A2 wasn't (or vice versa).

Diff:
---
 gcc/ifcvt.c                                        | 3 ++-
 gcc/testsuite/gcc.target/aarch64/morello/ifcvt-1.c | 7 +++++++
 2 files changed, 9 insertions(+), 1 deletion(-)

diff --git a/gcc/ifcvt.c b/gcc/ifcvt.c
index 0fb75023c71..3a0ad18969e 100644
--- a/gcc/ifcvt.c
+++ b/gcc/ifcvt.c
@@ -2055,7 +2055,8 @@ noce_try_cmove_arith (struct noce_if_info *if_info)
      already checked for no side effects.  */
   if (cse_not_expected
       && MEM_P (a) && MEM_P (b)
-      && MEM_ADDR_SPACE (a) == MEM_ADDR_SPACE (b))
+      && MEM_ADDR_SPACE (a) == MEM_ADDR_SPACE (b)
+      && mem_address_mode (a) == mem_address_mode (b))
     {
       machine_mode address_mode = mem_address_mode (a);
 
diff --git a/gcc/testsuite/gcc.target/aarch64/morello/ifcvt-1.c b/gcc/testsuite/gcc.target/aarch64/morello/ifcvt-1.c
new file mode 100644
index 00000000000..483a31af005
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/morello/ifcvt-1.c
@@ -0,0 +1,7 @@
+/* { dg-do compile } */
+
+int
+foo (int cond, int *a, int *__capability b)
+{
+  return cond ? *a : *b;
+}