[gcc r10-10701] store-merging: Avoid ICEs on roughly ~0ULL/8 sized stores [PR105094]

[gcc r10-10701] store-merging: Avoid ICEs on roughly ~0ULL/8 sized stores [PR105094]

[Jakub Jelinek]

https://gcc.gnu.org/g:8ea0c916cbb150c9a121eac95f2950d9bcea0b3e

commit r10-10701-g8ea0c916cbb150c9a121eac95f2950d9bcea0b3e
Author: Jakub Jelinek <jakub@redhat.com>
Date:   Wed Mar 30 10:21:16 2022 +0200

    store-merging: Avoid ICEs on roughly ~0ULL/8 sized stores [PR105094]
    
    On the following testcase on 64-bit targets, store-merging sees
    a MEM_REF store from {} ctor with "negative" bitsize where bitoff + bitsize
    wraps around to very small end offset.  This later confuses the code
    so that it allocates just a few bytes of memory but fills in huge amounts of
    it.  Later on there is a param_store_merging_max_size size check but due to
    the wrap-around we pass that.
    
    The following patch punts on such large bitsizes.
    
    2022-03-30  Jakub Jelinek  <jakub@redhat.com>
    
            PR tree-optimization/105094
            * gimple-ssa-store-merging.c (mem_valid_for_store_merging): Punt if
            bitsize <= 0 rather than just == 0.
    
            * gcc.dg/pr105094.c: New test.
    
    (cherry picked from commit 387e818cda0ffde86f624228c3da1ab28f453685)

Diff:
---
 gcc/gimple-ssa-store-merging.c  |  2 +-
 gcc/testsuite/gcc.dg/pr105094.c | 13 +++++++++++++
 2 files changed, 14 insertions(+), 1 deletion(-)

diff --git a/gcc/gimple-ssa-store-merging.c b/gcc/gimple-ssa-store-merging.c
index 4093ccaaafc..96f46b706be 100644
--- a/gcc/gimple-ssa-store-merging.c
+++ b/gcc/gimple-ssa-store-merging.c
@@ -4580,7 +4580,7 @@ mem_valid_for_store_merging (tree mem, poly_uint64 *pbitsize,
   tree base_addr = get_inner_reference (mem, &bitsize, &bitpos, &offset, &mode,
 					&unsignedp, &reversep, &volatilep);
   *pbitsize = bitsize;
-  if (known_eq (bitsize, 0))
+  if (known_le (bitsize, 0))
     return NULL_TREE;
 
   if (TREE_CODE (mem) == COMPONENT_REF
diff --git a/gcc/testsuite/gcc.dg/pr105094.c b/gcc/testsuite/gcc.dg/pr105094.c
new file mode 100644
index 00000000000..da6dc172a64
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/pr105094.c
@@ -0,0 +1,13 @@
+/* PR tree-optimization/105094 */
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+struct S { short a; char b[~(__SIZE_TYPE__)0 / __CHAR_BIT__ - 1]; };
+void bar (struct S *);
+
+void
+foo (void)
+{
+  struct S s = { 5 };
+  bar (&s);
+}