[gcc r9-10074] x86: Fix ix86_expand_vector_init for V*TImode [PR100887]

[gcc r9-10074] x86: Fix ix86_expand_vector_init for V*TImode [PR100887]

[Jakub Jelinek]

https://gcc.gnu.org/g:e7e1ad94007d79b5bae948a03b6c6b57243708bc

commit r9-10074-ge7e1ad94007d79b5bae948a03b6c6b57243708bc
Author: Jakub Jelinek <jakub@redhat.com>
Date:   Fri Jun 4 11:20:02 2021 +0200

    x86: Fix ix86_expand_vector_init for V*TImode [PR100887]
    
    We have vec_initv4tiv2ti and vec_initv2titi patterns which call
    ix86_expand_vector_init and assume it works for those modes.  For the
    case of construction from two half-sized vectors, the code assumes it
    will always succeed, but we have only insn patterns with SImode and DImode
    element types.  QImode and HImode element types are already handled
    by performing it with same sized vectors with SImode elements and the
    following patch extends that to V*TImode vectors.
    
    2021-06-04  Jakub Jelinek  <jakub@redhat.com>
    
            PR target/100887
            * config/i386/i386.c (ix86_expand_vector_init): Handle
            concatenation from half-sized modes with TImode elements.
    
    (cherry picked from commit b7dd2e4eeb44bc8678ecde8a6c7401de85e63561)

Diff:
---
 gcc/config/i386/i386.c | 10 +++++++---
 1 file changed, 7 insertions(+), 3 deletions(-)

diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 8d00f6f94a0..c7f1f2ba84b 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -43427,11 +43427,15 @@ ix86_expand_vector_init (bool mmx_ok, rtx target, rtx vals)
       if (GET_MODE_NUNITS (GET_MODE (x)) * 2 == n_elts)
 	{
 	  rtx ops[2] = { XVECEXP (vals, 0, 0), XVECEXP (vals, 0, 1) };
-	  if (inner_mode == QImode || inner_mode == HImode)
+	  if (inner_mode == QImode
+	      || inner_mode == HImode
+	      || inner_mode == TImode)
 	    {
 	      unsigned int n_bits = n_elts * GET_MODE_SIZE (inner_mode);
-	      mode = mode_for_vector (SImode, n_bits / 4).require ();
-	      inner_mode = mode_for_vector (SImode, n_bits / 8).require ();
+	      scalar_mode elt_mode = inner_mode == TImode ? DImode : SImode;
+	      n_bits /= GET_MODE_SIZE (elt_mode);
+	      mode = mode_for_vector (elt_mode, n_bits).require ();
+	      inner_mode = mode_for_vector (elt_mode, n_bits / 2).require ();
 	      ops[0] = gen_lowpart (inner_mode, ops[0]);
 	      ops[1] = gen_lowpart (inner_mode, ops[1]);
 	      subtarget = gen_reg_rtx (mode);