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* [gcc r13-552] i386: Fix up V2DI and V1TI inequality comparisons [PR105613]
@ 2022-05-17 10:11 Jakub Jelinek
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From: Jakub Jelinek @ 2022-05-17 10:11 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:254cbf72661b932eb039220fccef9a2546ab8f4e
commit r13-552-g254cbf72661b932eb039220fccef9a2546ab8f4e
Author: Jakub Jelinek <jakub@redhat.com>
Date: Tue May 17 12:10:30 2022 +0200
i386: Fix up V2DI and V1TI inequality comparisons [PR105613]
The recent r13-458 change to introduce vec_cmpeqv1tiv1ti and
add TARGET_SSE2 support to vec_cmpeqv2div2di works nicely for
equality comparisons, but as the testcase shows doesn't work
for inequality comparisons.
For EQ if we perform comparison with twice as many half-sized elemenets,
the result should be ~0 when both halves are ~0 only (both halves need
to be equal for the whole to be equal), otherwise 0, so AND is the
correct operation for it.
But for NE, the result should be ~0 when either of the halves is ~0
(if either half is not equal, the whole is not equal) and so the right
operation for NE is IOR, not AND.
2022-05-17 Jakub Jelinek <jakub@redhat.com>
PR target/105613
* config/i386/sse.md (vec_cmpeqv2div2di, vec_cmpeqv1tiv1ti): Use
andv4si3 only for EQ, for NE use iorv4si3 instead.
* gcc.c-torture/execute/pr105613.c: New test.
Diff:
---
gcc/config/i386/sse.md | 10 ++++++++--
gcc/testsuite/gcc.c-torture/execute/pr105613.c | 26 ++++++++++++++++++++++++++
2 files changed, 34 insertions(+), 2 deletions(-)
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index 873d048acfe..92890d4957d 100644
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -4407,7 +4407,10 @@
emit_insn (gen_sse2_pshufd (tmp1, ops[0], GEN_INT (0xb1)));
rtx tmp2 = gen_reg_rtx (V4SImode);
- emit_insn (gen_andv4si3 (tmp2, tmp1, ops[0]));
+ if (GET_CODE (operands[1]) == EQ)
+ emit_insn (gen_andv4si3 (tmp2, tmp1, ops[0]));
+ else
+ emit_insn (gen_iorv4si3 (tmp2, tmp1, ops[0]));
emit_move_insn (operands[0], gen_lowpart (V2DImode, tmp2));
}
@@ -4435,7 +4438,10 @@
emit_insn (gen_sse2_pshufd (tmp1, tmp2, GEN_INT (0x4e)));
rtx tmp3 = gen_reg_rtx (V4SImode);
- emit_insn (gen_andv4si3 (tmp3, tmp2, tmp1));
+ if (GET_CODE (operands[1]) == EQ)
+ emit_insn (gen_andv4si3 (tmp3, tmp2, tmp1));
+ else
+ emit_insn (gen_iorv4si3 (tmp3, tmp2, tmp1));
emit_move_insn (operands[0], gen_lowpart (V1TImode, tmp3));
DONE;
diff --git a/gcc/testsuite/gcc.c-torture/execute/pr105613.c b/gcc/testsuite/gcc.c-torture/execute/pr105613.c
new file mode 100644
index 00000000000..6e51e191ec0
--- /dev/null
+++ b/gcc/testsuite/gcc.c-torture/execute/pr105613.c
@@ -0,0 +1,26 @@
+/* PR target/105613 */
+/* { dg-do run { target int128 } } */
+
+typedef unsigned __int128 __attribute__((__vector_size__ (16))) V;
+
+void
+foo (V v, V *r)
+{
+ *r = v != 0;
+}
+
+int
+main ()
+{
+ V r;
+ foo ((V) {5}, &r);
+ if (r[0] != ~(unsigned __int128) 0)
+ __builtin_abort ();
+ foo ((V) {0x500000005ULL}, &r);
+ if (r[0] != ~(unsigned __int128) 0)
+ __builtin_abort ();
+ foo ((V) {0}, &r);
+ if (r[0] != 0)
+ __builtin_abort ();
+ return 0;
+}
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