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* [gcc r13-1054] Daily bump.
@ 2022-06-12 0:17 GCC Administrator
0 siblings, 0 replies; only message in thread
From: GCC Administrator @ 2022-06-12 0:17 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:cbd842717ec5cab989141bf1575846c2acef818d
commit r13-1054-gcbd842717ec5cab989141bf1575846c2acef818d
Author: GCC Administrator <gccadmin@gcc.gnu.org>
Date: Sun Jun 12 00:16:26 2022 +0000
Daily bump.
Diff:
---
gcc/ChangeLog | 50 +++++++++++++++++++++++++++++++++++++++++++++++++
gcc/DATESTAMP | 2 +-
gcc/testsuite/ChangeLog | 6 ++++++
3 files changed, 57 insertions(+), 1 deletion(-)
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index e748cfd7f17..c6bd191c3b8 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,53 @@
+2022-06-11 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
+
+ * config/xtensa/xtensa-protos.h (xtensa_constantsynth):
+ New prototype.
+ * config/xtensa/xtensa.cc (xtensa_emit_constantsynth,
+ xtensa_constantsynth_2insn, xtensa_constantsynth_rtx_SLLI,
+ xtensa_constantsynth_rtx_ADDSUBX, xtensa_constantsynth):
+ New backend functions that process the abovementioned logic.
+ (xtensa_emit_move_sequence): Revert the previous changes.
+ * config/xtensa/xtensa.md: New split patterns for integer
+ and floating-point, as the frontend part.
+
+2022-06-11 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
+
+ * config/xtensa/xtensa.cc (xtensa_rtx_costs): Correct wrong case
+ for ABS and NEG, add missing case for BSWAP and CLRSB, and
+ double the costs for integer divisions using libfuncs if
+ optimizing for speed, in order to take advantage of fast constant
+ division by multiplication.
+ (TARGET_INSN_COST): New macro definition.
+ (xtensa_is_insn_L32R_p, xtensa_insn_cost): New functions for
+ calculating relative costs of a RTL insns, for both of speed and
+ size.
+ * config/xtensa/xtensa.md (return, nop, trap): Correct values of
+ the attribute "length" that depends on TARGET_DENSITY.
+ (define_asm_attributes, blockage, frame_blockage): Add missing
+ attributes.
+ * config/xtensa/xtensa.opt (-mextra-l32r-costs=): New machine-
+ dependent option, however, preparatory work for now.
+
+2022-06-11 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
+
+ * config/xtensa/xtensa.cc (xtensa_expand_block_set_small_loop):
+ Pass through the block length / loop count conditions if
+ zero-overhead looping is configured and active,
+
+2022-06-11 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
+
+ * config/xtensa/xtensa.md (mulsidi3, umulsidi3):
+ Split into individual signedness, in order to use libcall
+ "__umulsidi3" but not the other.
+ (<u>mulhisi3): Merge into one by using code iterator.
+ (<u>mulsidi3, mulhisi3, umulhisi3): Remove.
+
+2022-06-11 Michael Meissner <meissner@linux.ibm.com>
+
+ * config/rs6000/rs6000.cc (rs6000_option_override_internal): Do
+ not generate block copies with vector pair instructions if we are
+ tuning for power10.
+
2022-06-10 Roger Sayle <roger@nextmovesoftware.com>
PR rtl-optimization/7061
diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index 11ff5fbe522..a520b7a8f32 100644
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20220611
+20220612
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 604f4e3b0a8..31317fbeaa6 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,9 @@
+2022-06-11 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
+
+ * gcc.target/xtensa/constsynth_2insns.c: New.
+ * gcc.target/xtensa/constsynth_3insns.c: Ditto.
+ * gcc.target/xtensa/constsynth_double.c: Ditto.
+
2022-06-10 Nathan Sidwell <nathan@acm.org>
* g++.dg/modules/init-3_a.C: New.
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