public inbox for gcc-cvs@sourceware.org help / color / mirror / Atom feed
From: Jakub Jelinek <jakub@gcc.gnu.org> To: gcc-cvs@gcc.gnu.org Subject: [gcc r13-1061] i386: Fix up *<dwi>3_doubleword_mask [PR105911] Date: Mon, 13 Jun 2022 08:54:34 +0000 (GMT) [thread overview] Message-ID: <20220613085434.DEFFC38618D7@sourceware.org> (raw) https://gcc.gnu.org/g:13ea4a6e830da1f245136601e636dec62e74d1a7 commit r13-1061-g13ea4a6e830da1f245136601e636dec62e74d1a7 Author: Jakub Jelinek <jakub@redhat.com> Date: Mon Jun 13 10:53:33 2022 +0200 i386: Fix up *<dwi>3_doubleword_mask [PR105911] Another regression caused by my recent patch. This time because define_insn_and_split only requires that the constant mask is const_int_operand. When it was only SImode, that wasn't a problem, HImode neither, but for DImode if we need to and the shift count we might run into a problem that it isn't a representable signed 32-bit immediate. But, we don't really care about the upper bits of the mask, so we can just mask the CONST_INT with the mode mask. 2022-06-13 Jakub Jelinek <jakub@redhat.com> PR target/105911 * config/i386/i386.md (*ashl<dwi>3_doubleword_mask, *<insn><dwi>3_doubleword_mask): Use operands[3] masked with (<MODE_SIZE> * BITS_PER_UNIT) - 1 as AND operand instead of operands[3] unmodified. * gcc.dg/pr105911.c: New test. Diff: --- gcc/config/i386/i386.md | 6 ++++-- gcc/testsuite/gcc.dg/pr105911.c | 16 ++++++++++++++++ 2 files changed, 20 insertions(+), 2 deletions(-) diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 5b538413942..3093cb513b9 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -11937,7 +11937,8 @@ rtx xops[3]; xops[0] = gen_reg_rtx (GET_MODE (operands[2])); xops[1] = operands[2]; - xops[2] = operands[3]; + xops[2] = GEN_INT (INTVAL (operands[3]) + & ((<MODE_SIZE> * BITS_PER_UNIT) - 1)); ix86_expand_binary_operator (AND, GET_MODE (operands[2]), xops); operands[2] = xops[0]; } @@ -12905,7 +12906,8 @@ rtx xops[3]; xops[0] = gen_reg_rtx (GET_MODE (operands[2])); xops[1] = operands[2]; - xops[2] = operands[3]; + xops[2] = GEN_INT (INTVAL (operands[3]) + & ((<MODE_SIZE> * BITS_PER_UNIT) - 1)); ix86_expand_binary_operator (AND, GET_MODE (operands[2]), xops); operands[2] = xops[0]; } diff --git a/gcc/testsuite/gcc.dg/pr105911.c b/gcc/testsuite/gcc.dg/pr105911.c new file mode 100644 index 00000000000..55df3f15aff --- /dev/null +++ b/gcc/testsuite/gcc.dg/pr105911.c @@ -0,0 +1,16 @@ +/* PR target/105911 */ +/* { dg-do compile { target int128 } } */ +/* { dg-options "-O2" } */ + +__int128 v, x; +unsigned __int128 w; + +void bar (__int128, __int128); + +void +foo (void) +{ + bar (v /= v, v >> (v &= 0x100000001)); + bar (w /= w, w >> (w &= 0x300000003)); + bar (x /= x, x << (x &= 0x700000007)); +}
reply other threads:[~2022-06-13 8:54 UTC|newest] Thread overview: [no followups] expand[flat|nested] mbox.gz Atom feed
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=20220613085434.DEFFC38618D7@sourceware.org \ --to=jakub@gcc.gnu.org \ --cc=gcc-cvs@gcc.gnu.org \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions for how to clone and mirror all data and code used for this inbox; as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).