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* [gcc(refs/vendors/ARM/heads/morello)] Move remaining CHERI builtins to target-independent code
@ 2022-06-16 13:46 Richard Sandiford
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From: Richard Sandiford @ 2022-06-16 13:46 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:bd12be6019157dba91eb368f07065affa82ffe8b
commit bd12be6019157dba91eb368f07065affa82ffe8b
Author: Richard Sandiford <richard.sandiford@arm.com>
Date: Thu Jun 16 14:42:40 2022 +0100
Move remaining CHERI builtins to target-independent code
This patch moves the remaining four CHERI builtins to
target-specific code. It's mostly just for consistency;
it doesn't achieve much otherwise.
Diff:
---
gcc/builtin-types.def | 2 ++
gcc/builtins.c | 12 +++++++++
gcc/builtins.def | 11 ++++++++
gcc/config/aarch64/aarch64-builtins.c | 48 -----------------------------------
gcc/config/aarch64/aarch64-morello.md | 6 ++---
gcc/doc/md.texi | 22 +++++++++++++++-
gcc/internal-fn.def | 9 +++++++
gcc/target-insns.def | 5 +++-
8 files changed, 62 insertions(+), 53 deletions(-)
diff --git a/gcc/builtin-types.def b/gcc/builtin-types.def
index f54d7703a73..c0649f5d987 100644
--- a/gcc/builtin-types.def
+++ b/gcc/builtin-types.def
@@ -207,6 +207,7 @@ DEF_POINTER_TYPE (BT_PTR_PTR, BT_PTR)
DEF_FUNCTION_TYPE_0 (BT_FN_VOID, BT_VOID)
DEF_FUNCTION_TYPE_0 (BT_FN_BOOL, BT_BOOL)
DEF_FUNCTION_TYPE_0 (BT_FN_PTR, BT_PTR)
+DEF_FUNCTION_TYPE_0 (BT_FN_CAPPTR, BT_CAPPTR)
DEF_FUNCTION_TYPE_0 (BT_FN_CONST_STRING, BT_CONST_STRING)
DEF_FUNCTION_TYPE_0 (BT_FN_PID, BT_PID)
DEF_FUNCTION_TYPE_0 (BT_FN_INT, BT_INT)
@@ -287,6 +288,7 @@ DEF_FUNCTION_TYPE_1 (BT_FN_LONGLONG_LONGDOUBLE, BT_LONGLONG, BT_LONGDOUBLE)
DEF_FUNCTION_TYPE_1 (BT_FN_VOID_PTR, BT_VOID, BT_PTR)
DEF_FUNCTION_TYPE_1 (BT_FN_SIZE_CONST_STRING, BT_SIZE, BT_CONST_STRING)
DEF_FUNCTION_TYPE_1 (BT_FN_SIZE_CAPPTR, BT_SIZE, BT_CAPPTR)
+DEF_FUNCTION_TYPE_1 (BT_FN_SIZE_SIZE, BT_SIZE, BT_SIZE)
DEF_FUNCTION_TYPE_1 (BT_FN_INT_CONST_STRING, BT_INT, BT_CONST_STRING)
DEF_FUNCTION_TYPE_1 (BT_FN_PTR_PTR, BT_PTR, BT_PTR)
DEF_FUNCTION_TYPE_1 (BT_FN_CAPPTR_CAPPTR, BT_CAPPTR, BT_CAPPTR)
diff --git a/gcc/builtins.c b/gcc/builtins.c
index 2df8ca739ff..ac8190678f4 100644
--- a/gcc/builtins.c
+++ b/gcc/builtins.c
@@ -2235,6 +2235,9 @@ direct_cheri_internal_fn (built_in_function code)
case BUILT_IN_CHERI_FLAGS_SET:
return IFN_CAP_FLAGS_SET;
+ case BUILT_IN_CHERI_GLOBAL_DATA_GET:
+ return IFN_CAP_GLOBAL_DATA_GET;
+
case BUILT_IN_CHERI_LENGTH_GET:
return IFN_CAP_LENGTH_GET;
@@ -2250,6 +2253,15 @@ direct_cheri_internal_fn (built_in_function code)
case BUILT_IN_CHERI_PERMS_GET:
return IFN_CAP_PERMS_GET;
+ case BUILT_IN_CHERI_PROGRAM_COUNTER_GET:
+ return IFN_CAP_PROGRAM_COUNTER_GET;
+
+ case BUILT_IN_CHERI_REPRESENTABLE_ALIGNMENT_MASK:
+ return IFN_CAP_REPRESENTABLE_ALIGNMENT_MASK;
+
+ case BUILT_IN_CHERI_ROUND_REPRESENTABLE_LENGTH:
+ return IFN_CAP_ROUND_REPRESENTABLE_LENGTH;
+
case BUILT_IN_CHERI_SEAL:
return IFN_CAP_SEAL;
diff --git a/gcc/builtins.def b/gcc/builtins.def
index 4020569525c..09d0d15ffbb 100644
--- a/gcc/builtins.def
+++ b/gcc/builtins.def
@@ -1103,6 +1103,8 @@ DEF_GCC_BUILTIN (BUILT_IN_CHERI_FLAGS_GET, "cheri_flags_get",
BT_FN_SIZE_CAPPTR, ATTR_CONST_NOTHROW_LIST)
DEF_GCC_BUILTIN (BUILT_IN_CHERI_FLAGS_SET, "cheri_flags_set",
BT_FN_CAPPTR_CAPPTR_SIZE, ATTR_CONST_NOTHROW_LIST)
+DEF_GCC_BUILTIN (BUILT_IN_CHERI_GLOBAL_DATA_GET, "cheri_global_data_get",
+ BT_FN_CAPPTR, ATTR_CONST_NOTHROW_LIST)
DEF_GCC_BUILTIN (BUILT_IN_CHERI_LENGTH_GET, "cheri_length_get",
BT_FN_SIZE_CAPPTR, ATTR_CONST_NOTHROW_LIST)
DEF_GCC_BUILTIN (BUILT_IN_CHERI_OFFSET_GET, "cheri_offset_get",
@@ -1115,6 +1117,15 @@ DEF_GCC_BUILTIN (BUILT_IN_CHERI_PERMS_AND, "cheri_perms_and",
BT_FN_CAPPTR_CAPPTR_SIZE, ATTR_CONST_NOTHROW_LIST)
DEF_GCC_BUILTIN (BUILT_IN_CHERI_PERMS_GET, "cheri_perms_get",
BT_FN_SIZE_CAPPTR, ATTR_CONST_NOTHROW_LIST)
+DEF_GCC_BUILTIN (BUILT_IN_CHERI_PROGRAM_COUNTER_GET,
+ "cheri_program_counter_get",
+ BT_FN_CAPPTR, ATTR_CONST_NOTHROW_LIST)
+DEF_GCC_BUILTIN (BUILT_IN_CHERI_REPRESENTABLE_ALIGNMENT_MASK,
+ "cheri_representable_alignment_mask",
+ BT_FN_SIZE_SIZE, ATTR_CONST_NOTHROW_LIST)
+DEF_GCC_BUILTIN (BUILT_IN_CHERI_ROUND_REPRESENTABLE_LENGTH,
+ "cheri_round_representable_length",
+ BT_FN_SIZE_SIZE, ATTR_CONST_NOTHROW_LIST)
DEF_GCC_BUILTIN (BUILT_IN_CHERI_SEAL, "cheri_seal",
BT_FN_CAPPTR_CAPPTR_CAPPTR, ATTR_CONST_NOTHROW_LIST)
DEF_GCC_BUILTIN (BUILT_IN_CHERI_SEAL_ENTRY, "cheri_seal_entry",
diff --git a/gcc/config/aarch64/aarch64-builtins.c b/gcc/config/aarch64/aarch64-builtins.c
index 06a45428c8d..23ebbffcbc5 100644
--- a/gcc/config/aarch64/aarch64-builtins.c
+++ b/gcc/config/aarch64/aarch64-builtins.c
@@ -478,11 +478,7 @@ enum aarch64_builtins
AARCH64_BUILTIN_RSQRT_V2SF,
AARCH64_BUILTIN_RSQRT_V4SF,
- AARCH64_MORELLO_BUILTIN_GLOBAL_DATA_GET,
- AARCH64_MORELLO_BUILTIN_PC_GET,
AARCH64_MORELLO_BUILTIN_PTR_TO_CAP_OFFSET,
- AARCH64_MORELLO_BUILTIN_REPR_ALIGNMENT_MASK,
- AARCH64_MORELLO_BUILTIN_ROUND_REPR_LEN,
AARCH64_MORELLO_BUILTIN_SUBSET_CHECK,
AARCH64_MORELLO_BUILTIN_SUBSET_TEST_UNSEAL_OR_NULL,
@@ -1445,18 +1441,6 @@ aarch64_init_morello_builtins (void)
true);
morello_builtins_data data[] = {
- {"__builtin_cheri_global_data_get",
- AARCH64_MORELLO_BUILTIN_GLOBAL_DATA_GET,
- build_function_type_list (cap_type_node, NULL_TREE)},
- {"__builtin_cheri_program_counter_get",
- AARCH64_MORELLO_BUILTIN_PC_GET,
- build_function_type_list (cap_type_node, NULL_TREE)},
- {"__builtin_cheri_representable_alignment_mask",
- AARCH64_MORELLO_BUILTIN_REPR_ALIGNMENT_MASK,
- build_function_type_list (size_type_node, size_type_node, NULL_TREE)},
- {"__builtin_cheri_round_representable_length",
- AARCH64_MORELLO_BUILTIN_ROUND_REPR_LEN,
- build_function_type_list (size_type_node, size_type_node, NULL_TREE)},
{"__builtin_morello_chkssu",
AARCH64_MORELLO_BUILTIN_SUBSET_CHECK,
build_function_type_list (cap_type_node, const_cap_type_node,
@@ -2126,18 +2110,6 @@ aarch64_expand_morello_builtin (tree exp, rtx target, int fcode)
switch (fcode)
{
- case AARCH64_MORELLO_BUILTIN_GLOBAL_DATA_GET:
- {
- create_output_operand (&ops[0], target, CADImode);
- expand_insn (CODE_FOR_cap_global_data_get, 1, ops);
- return ops[0].value;
- }
- case AARCH64_MORELLO_BUILTIN_PC_GET:
- {
- create_output_operand (&ops[0], target, CADImode);
- expand_insn (CODE_FOR_aarch64_cap_pc_get, 1, ops);
- return ops[0].value;
- }
case AARCH64_MORELLO_BUILTIN_PTR_TO_CAP_OFFSET:
{
rtx op0 = expand_normal (CALL_EXPR_ARG (exp, 0));
@@ -2148,22 +2120,6 @@ aarch64_expand_morello_builtin (tree exp, rtx target, int fcode)
expand_insn (CODE_FOR_aarch64_ptr_to_cap_offset_cadi, 3, ops);
return ops[0].value;
}
- case AARCH64_MORELLO_BUILTIN_REPR_ALIGNMENT_MASK:
- {
- rtx op0 = expand_normal (CALL_EXPR_ARG (exp, 0));
- create_output_operand (&ops[0], target, DImode);
- create_input_operand (&ops[1], op0, DImode);
- expand_insn (CODE_FOR_aarch64_cap_repr_align_mask, 2, ops);
- return ops[0].value;
- }
- case AARCH64_MORELLO_BUILTIN_ROUND_REPR_LEN:
- {
- rtx op0 = expand_normal (CALL_EXPR_ARG (exp, 0));
- create_output_operand (&ops[0], target, DImode);
- create_input_operand (&ops[1], op0, DImode);
- expand_insn (CODE_FOR_aarch64_cap_round_repr_len, 2, ops);
- return ops[0].value;
- }
case AARCH64_MORELLO_BUILTIN_SUBSET_CHECK:
{
rtx op0 = expand_normal (CALL_EXPR_ARG (exp, 0));
@@ -2298,11 +2254,7 @@ aarch64_general_expand_builtin (unsigned int fcode, tree exp, rtx target,
emit_insn (GEN_FCN (CODE_FOR_aarch64_fjcvtzs) (target, op0));
return target;
- case AARCH64_MORELLO_BUILTIN_GLOBAL_DATA_GET:
- case AARCH64_MORELLO_BUILTIN_PC_GET:
case AARCH64_MORELLO_BUILTIN_PTR_TO_CAP_OFFSET:
- case AARCH64_MORELLO_BUILTIN_REPR_ALIGNMENT_MASK:
- case AARCH64_MORELLO_BUILTIN_ROUND_REPR_LEN:
case AARCH64_MORELLO_BUILTIN_SUBSET_CHECK:
case AARCH64_MORELLO_BUILTIN_SUBSET_TEST_UNSEAL_OR_NULL:
return aarch64_expand_morello_builtin (exp, target, fcode);
diff --git a/gcc/config/aarch64/aarch64-morello.md b/gcc/config/aarch64/aarch64-morello.md
index 956e968bde6..cc93fc9397c 100644
--- a/gcc/config/aarch64/aarch64-morello.md
+++ b/gcc/config/aarch64/aarch64-morello.md
@@ -197,7 +197,7 @@
"gclen\\t%0, %1"
)
-(define_insn "aarch64_cap_repr_align_mask"
+(define_insn "cap_representable_alignment_mask"
[(set (match_operand:DI 0 "register_operand" "=r")
(unspec:DI [(match_operand:DI 1 "register_operand" "r")]
UNSPEC_CHERI_REPR_ALIGN_MASK)
@@ -206,7 +206,7 @@
"rrmask\\t%0, %1"
)
-(define_insn "aarch64_cap_round_repr_len"
+(define_insn "cap_round_representable_length"
[(set (match_operand:DI 0 "register_operand" "=r")
(unspec:DI [(match_operand:DI 1 "register_operand" "r")]
UNSPEC_CHERI_ROUND_REPR_LEN)
@@ -404,7 +404,7 @@
"gcperm\\t%0, %1"
)
-(define_insn "aarch64_cap_pc_get"
+(define_insn "cap_program_counter_get"
[(set (match_operand:CADI 0 "register_operand" "=r")
(unspec_volatile:CADI [(const_int 0)]
UNSPECV_CHERI_PC_GET))]
diff --git a/gcc/doc/md.texi b/gcc/doc/md.texi
index 75314cbdd1e..c80ef9a9ec9 100644
--- a/gcc/doc/md.texi
+++ b/gcc/doc/md.texi
@@ -6873,7 +6873,27 @@ the restoring of a function return value from the result block.
@item @samp{cap_global_data_get}
An instruction that is used on capability architectures that have the concept
of a global default capability to be used in integer to capability conversions.
-This expands the CAP_GLOBAL_DATA_GET internal function to RTL.
+The instruction sets operand 0 to this global capability.
+
+@cindex @code{cap_program_counter_get} instruction pattern
+@item @samp{cap_program_counter_get}
+Only used on capability architectures. Set capability operand 0 to the current
+program counter.
+
+@cindex @code{cap_representable_alignment_mask} instruction pattern
+@cindex @code{cap_round_representable_length} instruction pattern
+@item @samp{cap_representable_alignment_mask}
+@itemx @samp{cap_round_representable_length}
+Only used on capability architectures. For both instructions, input
+operand 1 specifies the minimum acceptable length for a capability's
+bounds. The instructions then produce a mask @var{m} and length
+@var{l} such that, for any valid capability @var{c},
+@code{cap_bounds_set_exact} will succeed for address operand
+@samp{@var{c} & @var{m}} and length operand @var{l}.
+@code{cap_representable_alignment_mask} sets output operand 0 to @var{m}
+and @code{cap_round_representable_length} sets output operand 0 to @var{l}.
+All operands have the mode normally associated with @code{size_t} on
+this target.
@cindex @code{nop} instruction pattern
@item @samp{nop}
diff --git a/gcc/internal-fn.def b/gcc/internal-fn.def
index e5a9d0c0aef..cdbeda81992 100644
--- a/gcc/internal-fn.def
+++ b/gcc/internal-fn.def
@@ -409,6 +409,15 @@ DEF_INTERNAL_FN (REPLACE_ADDRESS_VALUE, ECF_CONST | ECF_LEAF | ECF_NOTHROW, ".RR
DEF_INTERNAL_INSN_FN (CAP_GLOBAL_DATA_GET, ECF_CONST | ECF_NOTHROW,
cap_global_data_get, 1, 0)
+DEF_INTERNAL_INSN_FN (CAP_PROGRAM_COUNTER_GET,
+ ECF_CONST | ECF_LEAF | ECF_NOTHROW,
+ cap_program_counter_get, 1, 0)
+DEF_INTERNAL_INSN_FN (CAP_REPRESENTABLE_ALIGNMENT_MASK,
+ ECF_CONST | ECF_LEAF | ECF_NOTHROW,
+ cap_representable_alignment_mask, 1, 1)
+DEF_INTERNAL_INSN_FN (CAP_ROUND_REPRESENTABLE_LENGTH,
+ ECF_CONST | ECF_LEAF | ECF_NOTHROW,
+ cap_round_representable_length, 1, 1)
DEF_INTERNAL_OPTAB_FN (CAP_ADDRESS_GET, ECF_CONST | ECF_NOTHROW,
cap_address_get, unary)
diff --git a/gcc/target-insns.def b/gcc/target-insns.def
index 48ad57d2c72..8032f9e4e2c 100644
--- a/gcc/target-insns.def
+++ b/gcc/target-insns.def
@@ -44,6 +44,10 @@ DEF_TARGET_INSN (call_pop, (rtx x0, rtx opt1, rtx opt2, rtx opt3))
DEF_TARGET_INSN (call_value, (rtx x0, rtx x1, rtx opt2, rtx opt3, rtx opt4))
DEF_TARGET_INSN (call_value_pop, (rtx x0, rtx x1, rtx opt2, rtx opt3,
rtx opt4))
+DEF_TARGET_INSN (cap_global_data_get, (rtx x0))
+DEF_TARGET_INSN (cap_program_counter_get, (rtx x0))
+DEF_TARGET_INSN (cap_representable_alignment_mask, (rtx x0, rtx x1))
+DEF_TARGET_INSN (cap_round_representable_length, (rtx x0, rtx x1))
DEF_TARGET_INSN (casesi, (rtx x0, rtx x1, rtx x2, rtx x3, rtx x4))
DEF_TARGET_INSN (check_stack, (rtx x0))
DEF_TARGET_INSN (clear_cache, (rtx x0, rtx x1))
@@ -106,4 +110,3 @@ DEF_TARGET_INSN (trap, (void))
DEF_TARGET_INSN (unique, (void))
DEF_TARGET_INSN (untyped_call, (rtx x0, rtx x1, rtx x2))
DEF_TARGET_INSN (untyped_return, (rtx x0, rtx x1))
-DEF_TARGET_INSN (cap_global_data_get, (rtx x0))
\ No newline at end of file
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2022-06-16 13:46 [gcc(refs/vendors/ARM/heads/morello)] Move remaining CHERI builtins to target-independent code Richard Sandiford
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