[gcc r13-1246] [PATCH, RS6000 3/5] Rework the RS6000_BTM defines, continued.

[gcc r13-1246] [PATCH, RS6000 3/5] Rework the RS6000_BTM defines, continued.

[Will Schmidt]

https://gcc.gnu.org/g:a5c117e9f38d5f147a31f137706afbc55b12828f

commit r13-1246-ga5c117e9f38d5f147a31f137706afbc55b12828f
Author: Will Schmidt <will_schmidt@vnet.ibm.com>
Date:   Thu Jun 23 15:50:57 2022 -0500

    [PATCH,RS6000 3/5] Rework the RS6000_BTM defines, continued.
    
    The RS6000_BTM_<xxxx> definitions are mostly unused after
    the rs6000 builtin code was reworked.   This cleans
    up the remaining RS6000_BTM_<xxxx> references by replacing
    them with their OPTION_MASK_<xxxx> equivalents.
    
    This patch removes the defines
    RS6000_BTM_MODULO, RS6000_BTM_ALTIVEC, RS6000_BTM_CMPB,
    RS6000_BTM_VSX, RS6000_BTM_P8_VECTOR, RS6000_BTM_P9_VECTOR,
    RS6000_BTM_P9_MISC, RS6000_BTM_CRYPTO, RS6000_BTM_HTM,
    RS6000_BTM_FRE.
    
    gcc/
            * config/rs6000/rs6000.cc (RS6000_BTM_ALTIVEC, RS6000_BTM_CMPB,
            RS6000_BTM_VSX, RS6000_BTM_FRE, RS6000_BTM_P8_VECTOR,
            RS6000_BTM_P9_VECTOR, RS6000_BTM_P9_MISC, RS6000_BTM_MODULO,
            RS6000_BTM_CRYPTO, RS6000_BTM_HTM): Replace with OPTION_MASK_ALTIVEC,
            OPTION_MASK_CMPB, OPTION_MASK_VSX, OPTION_MASK_POPCNTB,
            OPTION_MASK_P8_VECTOR, OPTION_MASK_P9_VECTOR, OPTION_MASK_P9_MISC,
            OPTION_MASK_MODULO, OPTION_MASK_CRYPTO, OPTION_MASK_HTM.
            * config/rs6000/rs6000.h (RS6000_BTM_MODULO, RS6000_BTM_ALTIVEC,
            RS6000_BTM_CMPB, RS6000_BTM_VSX, RS6000_BTM_P8_VECTOR,
            RS6000_BTM_P9_VECTOR, RS6000_BTM_P9_MISC, RS6000_BTM_CRYPTO,
            RS6000_BTM_HTM, RS6000_BTM_FRE): Remove.

Diff:
---
 gcc/config/rs6000/rs6000.cc | 36 ++++++++++++++++++------------------
 gcc/config/rs6000/rs6000.h  | 20 --------------------
 2 files changed, 18 insertions(+), 38 deletions(-)

diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index 092d8e6cbe6..21780563d45 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -3379,23 +3379,23 @@ darwin_rs6000_override_options (void)
 HOST_WIDE_INT
 rs6000_builtin_mask_calculate (void)
 {
-  return (((TARGET_ALTIVEC)		    ? RS6000_BTM_ALTIVEC   : 0)
-	  | ((TARGET_CMPB)		    ? RS6000_BTM_CMPB	   : 0)
-	  | ((TARGET_VSX)		    ? RS6000_BTM_VSX	   : 0)
-	  | ((TARGET_FRE)		    ? RS6000_BTM_FRE	   : 0)
+  return (((TARGET_ALTIVEC)		    ? OPTION_MASK_ALTIVEC    : 0)
+	  | ((TARGET_CMPB)		    ? OPTION_MASK_CMPB	     : 0)
+	  | ((TARGET_VSX)		    ? OPTION_MASK_VSX	     : 0)
+	  | ((TARGET_FRE)		    ? OPTION_MASK_POPCNTB    : 0)
 	  | ((TARGET_FRES)		    ? OPTION_MASK_PPC_GFXOPT : 0)
 	  | ((TARGET_FRSQRTE)		    ? OPTION_MASK_PPC_GFXOPT : 0)
 	  | ((TARGET_FRSQRTES)		    ? OPTION_MASK_POPCNTB    : 0)
 	  | ((TARGET_POPCNTD)		    ? OPTION_MASK_POPCNTD    : 0)
 	  | ((rs6000_cpu == PROCESSOR_CELL) ? OPTION_MASK_FPRND      : 0)
-	  | ((TARGET_P8_VECTOR)		    ? RS6000_BTM_P8_VECTOR : 0)
-	  | ((TARGET_P9_VECTOR)		    ? RS6000_BTM_P9_VECTOR : 0)
-	  | ((TARGET_P9_MISC)		    ? RS6000_BTM_P9_MISC   : 0)
-	  | ((TARGET_MODULO)		    ? RS6000_BTM_MODULO    : 0)
+	  | ((TARGET_P8_VECTOR)		    ? OPTION_MASK_P8_VECTOR  : 0)
+	  | ((TARGET_P9_VECTOR)		    ? OPTION_MASK_P9_VECTOR  : 0)
+	  | ((TARGET_P9_MISC)		    ? OPTION_MASK_P9_MISC    : 0)
+	  | ((TARGET_MODULO)		    ? OPTION_MASK_MODULO     : 0)
 	  | ((TARGET_64BIT)		    ? MASK_64BIT	     : 0)
 	  | ((TARGET_POWERPC64)		    ? MASK_POWERPC64	     : 0)
-	  | ((TARGET_CRYPTO)		    ? RS6000_BTM_CRYPTO	   : 0)
-	  | ((TARGET_HTM)		    ? RS6000_BTM_HTM	   : 0)
+	  | ((TARGET_CRYPTO)		    ? OPTION_MASK_CRYPTO     : 0)
+	  | ((TARGET_HTM)		    ? OPTION_MASK_HTM	     : 0)
 	  | ((TARGET_DFP)		    ? OPTION_MASK_DFP	     : 0)
 	  | ((TARGET_HARD_FLOAT)	    ? OPTION_MASK_SOFT_FLOAT : 0)
 	  | ((TARGET_LONG_DOUBLE_128
@@ -24053,19 +24053,19 @@ static struct rs6000_opt_mask const rs6000_opt_masks[] =
 /* Builtin mask mapping for printing the flags.  */
 static struct rs6000_opt_mask const rs6000_builtin_mask_names[] =
 {
-  { "altivec",		 RS6000_BTM_ALTIVEC,	false, false },
-  { "vsx",		 RS6000_BTM_VSX,	false, false },
-  { "fre",		 RS6000_BTM_FRE,	false, false },
+  { "altivec",		 OPTION_MASK_ALTIVEC,	false, false },
+  { "vsx",		 OPTION_MASK_VSX,	false, false },
+  { "fre",		 OPTION_MASK_POPCNTB,	false, false },
   { "fres",		 OPTION_MASK_PPC_GFXOPT, false, false },
   { "frsqrte",		 OPTION_MASK_PPC_GFXOPT, false, false },
   { "frsqrtes",		 OPTION_MASK_POPCNTB,	false, false },
   { "popcntd",		 OPTION_MASK_POPCNTD,	false, false },
   { "cell",		 OPTION_MASK_FPRND,	false, false },
-  { "power8-vector",	 RS6000_BTM_P8_VECTOR,	false, false },
-  { "power9-vector",	 RS6000_BTM_P9_VECTOR,	false, false },
-  { "power9-misc",	 RS6000_BTM_P9_MISC,	false, false },
-  { "crypto",		 RS6000_BTM_CRYPTO,	false, false },
-  { "htm",		 RS6000_BTM_HTM,	false, false },
+  { "power8-vector",	 OPTION_MASK_P8_VECTOR,	false, false },
+  { "power9-vector",	 OPTION_MASK_P9_VECTOR,	false, false },
+  { "power9-misc",	 OPTION_MASK_P9_MISC,	false, false },
+  { "crypto",		 OPTION_MASK_CRYPTO,	false, false },
+  { "htm",		 OPTION_MASK_HTM,	false, false },
   { "hard-dfp",		 OPTION_MASK_DFP,	false, false },
   { "hard-float",	 OPTION_MASK_SOFT_FLOAT, false, false },
   { "long-double-128",	 OPTION_MASK_MULTIPLE,	false, false },
diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h
index 384c5f1599a..72eb473acbc 100644
--- a/gcc/config/rs6000/rs6000.h
+++ b/gcc/config/rs6000/rs6000.h
@@ -553,11 +553,6 @@ extern int rs6000_vector_align[];
 #define MASK_LITTLE_ENDIAN		OPTION_MASK_LITTLE_ENDIAN
 #endif
 
-#ifdef TARGET_MODULO
-#define RS6000_BTM_MODULO		OPTION_MASK_MODULO
-#endif
-
-
 /* For power systems, we want to enable Altivec and VSX builtins even if the
    user did not use -maltivec or -mvsx to allow the builtins to be used inside
    of #pragma GCC target or the target attribute to change the code level for a
@@ -2240,21 +2235,6 @@ extern char rs6000_reg_names[][8];	/* register names (0 vs. %r0).  */
 /* General flags.  */
 extern int frame_pointer_needed;
 
-
-/* Builtin targets.  For now, we reuse the masks for those options that are in
-   target flags, and pick a random bit for ldbl128, which isn't in
-   target_flags.  */
-#define RS6000_BTM_ALTIVEC	MASK_ALTIVEC	/* VMX/altivec vectors.  */
-#define RS6000_BTM_CMPB		MASK_CMPB	/* ISA 2.05: compare bytes.  */
-#define RS6000_BTM_VSX		MASK_VSX	/* VSX (vector/scalar).  */
-#define RS6000_BTM_P8_VECTOR	MASK_P8_VECTOR	/* ISA 2.07 vector.  */
-#define RS6000_BTM_P9_VECTOR	MASK_P9_VECTOR	/* ISA 3.0 vector.  */
-#define RS6000_BTM_P9_MISC	MASK_P9_MISC	/* ISA 3.0 misc. non-vector */
-#define RS6000_BTM_CRYPTO	MASK_CRYPTO	/* crypto funcs.  */
-#define RS6000_BTM_HTM		MASK_HTM	/* hardware TM funcs.  */
-#define RS6000_BTM_FRE		MASK_POPCNTB	/* FRE instruction.  */
-
-
 enum rs6000_builtin_type_index
 {
   RS6000_BTI_NOT_OPAQUE,