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* [gcc(refs/users/meissner/heads/work093)] Fixup KFmode to TFmode built-in functions.
@ 2022-07-07 4:39 Michael Meissner
0 siblings, 0 replies; only message in thread
From: Michael Meissner @ 2022-07-07 4:39 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:ef5744d41c9f9639cd9043b80267eed8cb2dc144
commit ef5744d41c9f9639cd9043b80267eed8cb2dc144
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Thu Jul 7 00:38:45 2022 -0400
Fixup KFmode to TFmode built-in functions.
2022-07-07 Michael Meissner <meissner@linux.ibm.com>
gcc/
* config/rs6000/rs6000-builtin.cc (rs6000_expand_builtin): If we
have certain KFmode built-in functions, convert to TFmode if a
long double was passed, and long double is IEEE 128-bit. Also if
the modes are different, call convert_to_mode instead of
copy_to_mode_reg.
Diff:
---
gcc/config/rs6000/rs6000-builtin.cc | 68 ++++++++++++++++++++++++++++++++++++-
1 file changed, 67 insertions(+), 1 deletion(-)
diff --git a/gcc/config/rs6000/rs6000-builtin.cc b/gcc/config/rs6000/rs6000-builtin.cc
index 457e463087f..64e3a375dd5 100644
--- a/gcc/config/rs6000/rs6000-builtin.cc
+++ b/gcc/config/rs6000/rs6000-builtin.cc
@@ -3290,6 +3290,70 @@ rs6000_expand_builtin (tree exp, rtx target, rtx /* subtarget */,
size_t uns_fcode = (size_t)fcode;
enum insn_code icode = rs6000_builtin_info[uns_fcode].icode;
+ /* If long double is IEEE 128-bit, we may need to convert from the KFmode
+ builtin function to the TFmode builtin function if the argument is long
+ double (i.e. TFmode). */
+ if (FLOAT128_IEEE_P (TFmode) && call_expr_nargs (exp) >= 1)
+ {
+ if (TYPE_MODE (TREE_TYPE (CALL_EXPR_ARG (exp, 0))) == TFmode)
+ switch (icode)
+ {
+ case CODE_FOR_sqrtkf2_odd:
+ icode = CODE_FOR_sqrttf2_odd;
+ break;
+ case CODE_FOR_trunckfdf2_odd:
+ icode = CODE_FOR_trunctfdf2_odd;
+ break;
+ case CODE_FOR_addkf3_odd:
+ icode = CODE_FOR_addtf3_odd;
+ break;
+ case CODE_FOR_subkf3_odd:
+ icode = CODE_FOR_subtf3_odd;
+ break;
+ case CODE_FOR_mulkf3_odd:
+ icode = CODE_FOR_multf3_odd;
+ break;
+ case CODE_FOR_divkf3_odd:
+ icode = CODE_FOR_divtf3_odd;
+ break;
+ case CODE_FOR_fmakf4_odd:
+ icode = CODE_FOR_fmatf4_odd;
+ break;
+ case CODE_FOR_xsxexpqp_kf:
+ icode = CODE_FOR_xsxexpqp_tf;
+ break;
+ case CODE_FOR_xsxsigqp_kf:
+ icode = CODE_FOR_xsxsigqp_tf;
+ break;
+ case CODE_FOR_xststdcnegqp_kf:
+ icode = CODE_FOR_xststdcnegqp_tf;
+ break;
+ case CODE_FOR_xsiexpqp_kf:
+ icode = CODE_FOR_xsiexpqp_tf;
+ break;
+ case CODE_FOR_xsiexpqpf_kf:
+ icode = CODE_FOR_xsiexpqpf_tf;
+ break;
+ case CODE_FOR_xststdcqp_kf:
+ icode = CODE_FOR_xststdcqp_tf;
+ break;
+ case CODE_FOR_xscmpexpqp_eq_kf:
+ icode = CODE_FOR_xscmpexpqp_eq_tf;
+ break;
+ case CODE_FOR_xscmpexpqp_lt_kf:
+ icode = CODE_FOR_xscmpexpqp_lt_tf;
+ break;
+ case CODE_FOR_xscmpexpqp_gt_kf:
+ icode = CODE_FOR_xscmpexpqp_gt_tf;
+ break;
+ case CODE_FOR_xscmpexpqp_unordered_kf:
+ icode = CODE_FOR_xscmpexpqp_unordered_tf;
+ break;
+ default:
+ break;
+ }
+ }
+
/* In case of "#pragma target" changes, we initialize all builtins
but check for actual availability now, during expand time. For
invalid builtins, generate a normal call. */
@@ -3591,7 +3655,9 @@ rs6000_expand_builtin (tree exp, rtx target, rtx /* subtarget */,
for (int i = 0; i < nargs; i++)
if (!insn_data[icode].operand[i+k].predicate (op[i], mode[i+k]))
- op[i] = copy_to_mode_reg (mode[i+k], op[i]);
+ op[i] = ((mode[i+k] == GET_MODE (op[i]) || GET_MODE (op[i]) == VOIDmode)
+ ? copy_to_mode_reg (mode[i+k], op[i])
+ : convert_to_mode (mode[i+k], op[i], false));
rtx pat;
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