[gcc(refs/users/meissner/heads/work095)] Enable using overload built-ins for 128-bit floating point.

[gcc(refs/users/meissner/heads/work095)] Enable using overload built-ins for 128-bit floating point.

[Michael Meissner]

https://gcc.gnu.org/g:c3e997d66df169244d6b15ecfc573b2f57820496

commit c3e997d66df169244d6b15ecfc573b2f57820496
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Thu Jul 28 18:29:53 2022 -0400

    Enable using overload built-ins for 128-bit floating point.
    
    2022-07-28   Michael Meissner  <meissner@linux.ibm.com>
    
    gcc/
    
            * config/rs6000/rs6000-builtin.cc (rs6000_expand_builtin): Remove all
            of the code that changed KFmode built-in functions into TFmode, since
            these functions now support overloading between KFmode and TFmode.
            * config/rs6000/rs6000-c.cc (rs6000_builtin_type_compatible):
            Don't consider _Float128 and long double under
            -mabi=ieeelongdouble to be compatible for built-in functions.  Use
            overloading instead.
            * config/rs6000/rs6000.md (IFKF): Delete.
            (IFKF_reg): Delete.
            (@extenddf<mode>2_fprs): Remove extra test for
            TARGET_LONG_DOUBLE_128.
            (@extenddf<mode2>_vsx): Likewise.
            (extendiftf2): Allow __ibm128 even if _Float128 is not supported.
            (extendkfif2): New insn.
            (extendtfkf2): Allow __ibm128 even if _Float128 is not supported.
            (extendtfif2): Likewise.
            (trunckfif2): New insn.
            (trunctfif2): Allow __ibm128 even if _Float128 is not supported.
            (extendkftf2_internal): Split extend<mode>tf2_internal and
            extendtf<mode>2_internal into separate insns that handle either
            conversions between IEEE 128-bit types or between IBM 128-bit types.
            Set the type and insn length correctly.
            (extendtfkf2_internal): Likewise.
            (extendiftf2_internal): Likewise.
            (extendtfif2_internal): Likewise.

Diff:
---
 gcc/config/rs6000/rs6000-builtin.cc |  89 ------------------------------
 gcc/config/rs6000/rs6000-c.cc       |  10 +++-
 gcc/config/rs6000/rs6000.md         | 107 +++++++++++++++++++++++++++---------
 3 files changed, 87 insertions(+), 119 deletions(-)

diff --git a/gcc/config/rs6000/rs6000-builtin.cc b/gcc/config/rs6000/rs6000-builtin.cc
index 4f5c0475394..601232148f8 100644
--- a/gcc/config/rs6000/rs6000-builtin.cc
+++ b/gcc/config/rs6000/rs6000-builtin.cc
@@ -3292,79 +3292,6 @@ rs6000_expand_builtin (tree exp, rtx target, rtx /* subtarget */,
   size_t uns_fcode = (size_t)fcode;
   enum insn_code icode = rs6000_builtin_info[uns_fcode].icode;
 
-  /* TODO: The following commentary and code is inherited from the original
-     builtin processing code.  The commentary is a bit confusing, with the
-     intent being that KFmode is always IEEE-128, IFmode is always IBM
-     double-double, and TFmode is the current long double.  The code is
-     confusing in that it converts from KFmode to TFmode pattern names,
-     when the other direction is more intuitive.  Try to address this.  */
-
-  /* We have two different modes (KFmode, TFmode) that are the IEEE
-     128-bit floating point type, depending on whether long double is the
-     IBM extended double (KFmode) or long double is IEEE 128-bit (TFmode).
-     It is simpler if we only define one variant of the built-in function,
-     and switch the code when defining it, rather than defining two built-
-     ins and using the overload table in rs6000-c.cc to switch between the
-     two.  If we don't have the proper assembler, don't do this switch
-     because CODE_FOR_*kf* and CODE_FOR_*tf* will be CODE_FOR_nothing.  */
-  if (FLOAT128_IEEE_P (TFmode))
-    switch (icode)
-      {
-      case CODE_FOR_sqrtkf2_odd:
-	icode = CODE_FOR_sqrttf2_odd;
-	break;
-      case CODE_FOR_trunckfdf2_odd:
-	icode = CODE_FOR_trunctfdf2_odd;
-	break;
-      case CODE_FOR_addkf3_odd:
-	icode = CODE_FOR_addtf3_odd;
-	break;
-      case CODE_FOR_subkf3_odd:
-	icode = CODE_FOR_subtf3_odd;
-	break;
-      case CODE_FOR_mulkf3_odd:
-	icode = CODE_FOR_multf3_odd;
-	break;
-      case CODE_FOR_divkf3_odd:
-	icode = CODE_FOR_divtf3_odd;
-	break;
-      case CODE_FOR_fmakf4_odd:
-	icode = CODE_FOR_fmatf4_odd;
-	break;
-      case CODE_FOR_xsxexpqp_kf:
-	icode = CODE_FOR_xsxexpqp_tf;
-	break;
-      case CODE_FOR_xsxsigqp_kf:
-	icode = CODE_FOR_xsxsigqp_tf;
-	break;
-      case CODE_FOR_xststdcnegqp_kf:
-	icode = CODE_FOR_xststdcnegqp_tf;
-	break;
-      case CODE_FOR_xsiexpqp_kf:
-	icode = CODE_FOR_xsiexpqp_tf;
-	break;
-      case CODE_FOR_xsiexpqpf_kf:
-	icode = CODE_FOR_xsiexpqpf_tf;
-	break;
-      case CODE_FOR_xststdcqp_kf:
-	icode = CODE_FOR_xststdcqp_tf;
-	break;
-      case CODE_FOR_xscmpexpqp_eq_kf:
-	icode = CODE_FOR_xscmpexpqp_eq_tf;
-	break;
-      case CODE_FOR_xscmpexpqp_lt_kf:
-	icode = CODE_FOR_xscmpexpqp_lt_tf;
-	break;
-      case CODE_FOR_xscmpexpqp_gt_kf:
-	icode = CODE_FOR_xscmpexpqp_gt_tf;
-	break;
-      case CODE_FOR_xscmpexpqp_unordered_kf:
-	icode = CODE_FOR_xscmpexpqp_unordered_tf;
-	break;
-      default:
-	break;
-      }
-
   /* In case of "#pragma target" changes, we initialize all builtins
      but check for actual availability now, during expand time.  For
      invalid builtins, generate a normal call.  */
@@ -3514,22 +3441,6 @@ rs6000_expand_builtin (tree exp, rtx target, rtx /* subtarget */,
 	gcc_unreachable ();
     }
 
-  if (bif_is_ibm128 (*bifaddr) && TARGET_LONG_DOUBLE_128 && !TARGET_IEEEQUAD)
-    {
-      if (fcode == RS6000_BIF_PACK_IF)
-	{
-	  icode = CODE_FOR_packtf;
-	  fcode = RS6000_BIF_PACK_TF;
-	  uns_fcode = (size_t) fcode;
-	}
-      else if (fcode == RS6000_BIF_UNPACK_IF)
-	{
-	  icode = CODE_FOR_unpacktf;
-	  fcode = RS6000_BIF_UNPACK_TF;
-	  uns_fcode = (size_t) fcode;
-	}
-    }
-
   /* TRUE iff the built-in function returns void.  */
   bool void_func = TREE_TYPE (TREE_TYPE (fndecl)) == void_type_node;
   /* Position of first argument (0 for void-returning functions, else 1).  */
diff --git a/gcc/config/rs6000/rs6000-c.cc b/gcc/config/rs6000/rs6000-c.cc
index 4532cb4624b..364487cf19a 100644
--- a/gcc/config/rs6000/rs6000-c.cc
+++ b/gcc/config/rs6000/rs6000-c.cc
@@ -808,8 +808,11 @@ rs6000_builtin_type (int id)
 /* Check whether the type of an argument, T, is compatible with a type ID
    stored into a struct altivec_builtin_types.  Integer types are considered
    compatible; otherwise, the language hook lang_hooks.types_compatible_p makes
-   the decision.  Also allow long double and _Float128 to be compatible if
-   -mabi=ieeelongdouble.  */
+   the decision.
+
+   In the past, we used to consider _Float128 and long double to be compatible
+   under -mabi=ieeelongdouble.  We no longer consider them compatible and use
+   the overload mechanism to deal with KFmode vs. TFmode types.  */
 
 static inline bool
 is_float128_p (tree t)
@@ -832,7 +835,8 @@ rs6000_builtin_type_compatible (tree parmtype, tree argtype)
     return true;
 
   if (TARGET_IEEEQUAD && TARGET_LONG_DOUBLE_128
-      && is_float128_p (parmtype) && is_float128_p (argtype))
+      && is_float128_p (parmtype) && is_float128_p (argtype)
+      && TYPE_MODE (parmtype) == TYPE_MODE (argtype))
     return true;
 
   if (POINTER_TYPE_P (parmtype) && POINTER_TYPE_P (argtype))
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index 1367a2cb779..e17252bb8de 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -543,12 +543,6 @@
 ; Iterator for 128-bit VSX types for pack/unpack
 (define_mode_iterator FMOVE128_VSX [V1TI KF])
 
-; Iterators for converting to/from TFmode
-(define_mode_iterator IFKF [IF KF])
-
-; Constraints for moving IF/KFmode.
-(define_mode_attr IFKF_reg [(IF "d") (KF "wa")])
-
 ; Whether a floating point move is ok, don't allow SD without hardware FP
 (define_mode_attr fmove_ok [(SF "")
 			    (DF "")
@@ -8586,8 +8580,7 @@
 	(float_extend:IBM128
 	 (match_operand:DF 1 "nonimmediate_operand" "d,m,d")))
    (use (match_operand:DF 2 "nonimmediate_operand" "m,m,d"))]
-  "!TARGET_VSX && TARGET_HARD_FLOAT
-   && TARGET_LONG_DOUBLE_128 && FLOAT128_IBM_P (<MODE>mode)"
+  "!TARGET_VSX && TARGET_HARD_FLOAT && FLOAT128_IBM_P (<MODE>mode)"
   "#"
   "&& reload_completed"
   [(set (match_dup 3) (match_dup 1))
@@ -8604,7 +8597,7 @@
   [(set (match_operand:IBM128 0 "gpc_reg_operand" "=d,d")
 	(float_extend:IBM128
 	 (match_operand:DF 1 "nonimmediate_operand" "wa,m")))]
-  "TARGET_LONG_DOUBLE_128 && TARGET_VSX && FLOAT128_IBM_P (<MODE>mode)"
+  "TARGET_VSX && FLOAT128_IBM_P (<MODE>mode)"
   "#"
   "&& reload_completed"
   [(set (match_dup 2) (match_dup 1))
@@ -9061,7 +9054,7 @@
 (define_expand "extendiftf2"
   [(set (match_operand:TF 0 "gpc_reg_operand")
 	(float_extend:TF (match_operand:IF 1 "gpc_reg_operand")))]
-  "TARGET_FLOAT128_TYPE"
+  "TARGET_IBM128"
 {
   rs6000_expand_float128_convert (operands[0], operands[1], false);
   DONE;
@@ -9076,6 +9069,15 @@
   DONE;
 })
 
+(define_expand "extendkfif2"
+  [(set (match_operand:IF 0 "gpc_reg_operand")
+	(float_extend:IF (match_operand:KF 1 "gpc_reg_operand")))]
+  "TARGET_FLOAT128_TYPE"
+{
+  rs6000_expand_float128_convert (operands[0], operands[1], false);
+  DONE;
+})
+
 (define_expand "extendtfkf2"
   [(set (match_operand:KF 0 "gpc_reg_operand")
 	(float_extend:KF (match_operand:TF 1 "gpc_reg_operand")))]
@@ -9088,7 +9090,7 @@
 (define_expand "extendtfif2"
   [(set (match_operand:IF 0 "gpc_reg_operand")
 	(float_extend:IF (match_operand:TF 1 "gpc_reg_operand")))]
-  "TARGET_FLOAT128_TYPE"
+  "TARGET_IBM128"
 {
   rs6000_expand_float128_convert (operands[0], operands[1], false);
   DONE;
@@ -9097,7 +9099,7 @@
 (define_expand "trunciftf2"
   [(set (match_operand:TF 0 "gpc_reg_operand")
 	(float_truncate:TF (match_operand:IF 1 "gpc_reg_operand")))]
-  "TARGET_FLOAT128_TYPE"
+  "TARGET_IBM128"
 {
   rs6000_expand_float128_convert (operands[0], operands[1], false);
   DONE;
@@ -9112,6 +9114,15 @@
   DONE;
 })
 
+(define_expand "trunckfif2"
+  [(set (match_operand:IF 0 "gpc_reg_operand")
+	(float_truncate:IF (match_operand:KF 1 "gpc_reg_operand")))]
+  "TARGET_FLOAT128_TYPE"
+{
+  rs6000_expand_float128_convert (operands[0], operands[1], false);
+  DONE;
+})
+
 (define_expand "trunckftf2"
   [(set (match_operand:TF 0 "gpc_reg_operand")
 	(float_truncate:TF (match_operand:KF 1 "gpc_reg_operand")))]
@@ -9124,37 +9135,79 @@
 (define_expand "trunctfif2"
   [(set (match_operand:IF 0 "gpc_reg_operand")
 	(float_truncate:IF (match_operand:TF 1 "gpc_reg_operand")))]
-  "TARGET_FLOAT128_TYPE"
+  "TARGET_IBM128"
 {
   rs6000_expand_float128_convert (operands[0], operands[1], false);
   DONE;
 })
 
-(define_insn_and_split "*extend<mode>tf2_internal"
-  [(set (match_operand:TF 0 "gpc_reg_operand" "=<IFKF_reg>")
+;; Convert between KFmode and TFmode when -mabi=ieeelongdouble
+(define_insn_and_split "*extendkftf2_internal"
+  [(set (match_operand:TF 0 "gpc_reg_operand" "=wa,wa")
 	(float_extend:TF
-	 (match_operand:IFKF 1 "gpc_reg_operand" "<IFKF_reg>")))]
-   "TARGET_FLOAT128_TYPE
-    && FLOAT128_IBM_P (TFmode) == FLOAT128_IBM_P (<MODE>mode)"
+	 (match_operand:KF 1 "gpc_reg_operand" "0,wa")))]
+   "FLOAT128_IEEE_P (TFmode)"
   "#"
   "&& reload_completed"
   [(set (match_dup 0) (match_dup 2))]
 {
   operands[2] = gen_rtx_REG (TFmode, REGNO (operands[1]));
-})
+}
+  [(set_attr "type" "vecsimple")])
 
-(define_insn_and_split "*extendtf<mode>2_internal"
-  [(set (match_operand:IFKF 0 "gpc_reg_operand" "=<IFKF_reg>")
-	(float_extend:IFKF
-	 (match_operand:TF 1 "gpc_reg_operand" "<IFKF_reg>")))]
-   "TARGET_FLOAT128_TYPE
-    && FLOAT128_IBM_P (TFmode) == FLOAT128_IBM_P (<MODE>mode)"
+(define_insn_and_split "*extendtfkf2_internal"
+  [(set (match_operand:KF 0 "gpc_reg_operand" "=wa,wa")
+	(float_extend:KF
+	 (match_operand:TF 1 "gpc_reg_operand" "0,wa")))]
+   "FLOAT128_IEEE_P (TFmode)"
   "#"
   "&& reload_completed"
   [(set (match_dup 0) (match_dup 2))]
 {
-  operands[2] = gen_rtx_REG (<MODE>mode, REGNO (operands[1]));
-})
+  operands[2] = gen_rtx_REG (KFmode, REGNO (operands[1]));
+}
+  [(set_attr "type" "vecsimple")])
+
+;; Convert between IFmode and TFmode when -mabi=ibmlongdouble
+(define_insn_and_split "*extendiftf2_internal"
+  [(set (match_operand:TF 0 "gpc_reg_operand" "=d,&d")
+	(float_extend:TF
+	 (match_operand:IF 1 "input_operand" "0,d")))]
+   "FLOAT128_IBM_P (TFmode)"
+  "#"
+  "&& reload_completed"
+  [(set (match_dup 2) (match_dup 3))
+   (set (match_dup 4) (match_dup 5))]
+{
+  unsigned int op0_regno = reg_or_subregno (operands[0]);
+  unsigned int op1_regno = reg_or_subregno (operands[1]); 
+  operands[2] = gen_rtx_REG (DFmode, op0_regno);
+  operands[3] = gen_rtx_REG (DFmode, op1_regno);
+  operands[4] = gen_rtx_REG (DFmode, op0_regno + 1);
+  operands[5] = gen_rtx_REG (DFmode, op1_regno + 1);
+}
+  [(set_attr "type" "two")
+   (set_attr "num_insns" "2")])
+
+(define_insn_and_split "*extendtfif2_internal"
+  [(set (match_operand:IF 0 "gpc_reg_operand" "=d,&d")
+	(float_extend:IF
+	 (match_operand:TF 1 "input_operand" "0,d")))]
+   "FLOAT128_IBM_P (TFmode)"
+  "#"
+  "&& reload_completed"
+  [(set (match_dup 2) (match_dup 3))
+   (set (match_dup 4) (match_dup 5))]
+{
+  unsigned int op0_regno = reg_or_subregno (operands[0]);
+  unsigned int op1_regno = reg_or_subregno (operands[1]); 
+  operands[2] = gen_rtx_REG (DFmode, op0_regno);
+  operands[3] = gen_rtx_REG (DFmode, op1_regno);
+  operands[4] = gen_rtx_REG (DFmode, op0_regno + 1);
+  operands[5] = gen_rtx_REG (DFmode, op1_regno + 1);
+}
+  [(set_attr "type" "two")
+   (set_attr "num_insns" "2")])
 
 \f
 ;; Reload helper functions used by rs6000_secondary_reload.  The patterns all