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* [gcc(refs/users/pinskia/heads/riscvbit)] [RISCV] Fix a few constraints in bitmanip.md
@ 2022-08-15 23:14 Andrew Pinski
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From: Andrew Pinski @ 2022-08-15 23:14 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:d2d337f41f4512b6c1cbd2042f21721300eb1acb
commit d2d337f41f4512b6c1cbd2042f21721300eb1acb
Author: Andrew Pinski <apinski@marvell.com>
Date: Mon Aug 15 22:58:09 2022 +0000
[RISCV] Fix a few constraints in bitmanip.md
The constraints should be n instead of i. Also there
needs to a check for out of bounds zero_extract for
*bexti.
gcc/ChangeLog:
* config/riscv/bitmanip.md:
Change-Id: I62e9f5834eae692558e3e8fee2b334e55f9bb9b1
Diff:
---
gcc/config/riscv/bitmanip.md | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/gcc/config/riscv/bitmanip.md b/gcc/config/riscv/bitmanip.md
index 6f5f18eda41..80c5ccbfcbf 100644
--- a/gcc/config/riscv/bitmanip.md
+++ b/gcc/config/riscv/bitmanip.md
@@ -44,7 +44,7 @@
(plus:DI
(and:DI (ashift:DI (match_operand:DI 1 "register_operand" "r")
(match_operand:QI 2 "imm123_operand" "Ds3"))
- (match_operand 3 "immediate_operand" ""))
+ (match_operand 3 "immediate_operand" "n"))
(match_operand:DI 4 "register_operand" "r")))]
"TARGET_64BIT && TARGET_ZBA
&& (INTVAL (operands[3]) >> INTVAL (operands[2])) == 0xffffffff"
@@ -110,7 +110,7 @@
[(set (match_operand:DI 0 "register_operand" "=r")
(and:DI (ashift:DI (match_operand:DI 1 "register_operand" "r")
(match_operand:QI 2 "immediate_operand" "I"))
- (match_operand 3 "immediate_operand" "")))]
+ (match_operand 3 "immediate_operand" "n")))]
"TARGET_64BIT && TARGET_ZBA
&& (INTVAL (operands[3]) >> INTVAL (operands[2])) == 0xffffffff"
"slli.uw\t%0,%1,%2"
@@ -354,6 +354,6 @@
(zero_extract:X (match_operand:X 1 "register_operand" "r")
(const_int 1)
(match_operand 2 "immediate_operand" "n")))]
- "TARGET_ZBS"
+ "TARGET_ZBS && UINTVAL (operands[2]) < GET_MODE_BITSIZE (<MODE>mode)"
"bexti\t%0,%1,%2"
[(set_attr "type" "bitmanip")])
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